Hole pattern forming method and semiconductor device...

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S717000, C257SE21577

Reexamination Certificate

active

07943520

ABSTRACT:
A hole pattern forming method that forms a fine hole pattern in a work target layer that is formed on a semiconductor substrate, includes: forming a three-layer structure by laminating a carbon film layer, an intermediate mask layer, and a photoresist layer in that order on the work target layer; after patterning a hole pattern in the photoresist layer, patterning the hole pattern in the intermediate mask layer with the patterned photoresist layer serving as a mask; forming a sidewall oxide film on exposed portions of the photoresist layer, the intermediate mask layer, and the carbon film layer; forming a sidewall portion that includes the sidewall oxide film on inner wall surfaces of the hole pattern by etching back the sidewall oxide film; and after patterning a fine hole pattern in the carbon film layer with the sidewall portion and the intermediate mask layer serving as a mask, patterning the fine hole pattern in the work target layer with the patterned carbon film layer serving as a mask.

REFERENCES:
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patent: 09-045633 (1997-02-01), None
patent: 11-261025 (1999-09-01), None
patent: 2007-027180 (2007-02-01), None
Mamoru Terai et al., Advanced RLACS Technology for ArF Resist, Journal of Photopolymer Science and Technology, vol. 16, No. 4, (2003), p. 507-510.
Takamitsu Furukawa et al., Forming sub-100 nm contact holes, OKI Technical Review, Apr. 2002/Issue 190 vol. 69 No. 2, pp. 58-61.
Dennis Hausmann et al., Rapid Vapor Deposition of Highly Conformal Silica Nanolaminates, Science, vol. 298, Oct. 11, 2002, pp. 402-406.

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