Method of forming a low resistance semiconductor contact and...

Details Method of forming a low resistance semiconductor contact and... Method of forming a low resistance semiconductor contact and...

Filed on

2011-05-10

Date issued

2011-05-10

Examiner

Picardat, Kevin M (Department: 2822)

Patent Class

Active solid-state devices (e.g., transistors, solid-state diode

SubClass

Field effect device

SubSubClass

Having insulated electrode

Other Related Categories

C257S328000, C257S329000, C257S335000, C257S341000, C257S342000, C257S383000, C257S384000, C257S385000, C257S401000, C257S550000, C257S754000

Type

Reexamination Certificate

Status

active

Patent number

07939897

Description

ABSTRACT:
In one embodiment, silicide layers are formed on two oppositely doped adjacent semiconductor regions. A conductor material is formed electrically contacting both of the two silicides.

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