Semiconductor memory device including memory cell array...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S196000, C365S205000, C365S207000

Reexamination Certificate

active

07889564

ABSTRACT:
A semiconductor memory device and a sense amplifier thereof are provided. The semiconductor memory device includes a memory cell array and a plurality of sense amplifiers. The memory cell array includes a memory cell array block having a plurality of memory cells. Each of the plurality of sense amplifiers is configured to apply, based on a restore signal, a first voltage to a corresponding bit line to restore a first data value in a selected memory cell of the plurality of memory cells if a read value in the selected memory cell is the first data value and apply a second voltage based on the restore signal to the corresponding bit line to prevent a second data value from being restored in the selected memory cell if the read value in the selected memory cell is the second data value.

REFERENCES:
patent: 7145811 (2006-12-01), Ohsawa
patent: 2006/0181917 (2006-08-01), Kang et al.
patent: 2007/0127289 (2007-06-01), Lee
patent: 2007/0217269 (2007-09-01), Fujita
patent: 2007/0217289 (2007-09-01), Watabe et al.
patent: 2005-302234 (2005-10-01), None
patent: 2007-157322 (2007-06-01), None
patent: 2007-250153 (2007-09-01), None
patent: 10-0663368 (2006-12-01), None

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