Integrated semiconductor memory with distributor line for...

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S185090, C365S230030, C365S189020

Reexamination Certificate

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07929362

ABSTRACT:
In an embodiment, an integrated semiconductor memory includes a plurality of data lines via which data read out or to be read out from memory cells can be communicated, wherein the data lines comprise redundant data lines and non-redundant data lines, wherein the semiconductor memory has at least one data distributor line, and wherein a plurality of redundant data lines are connected up to the at least one data distributor line in such a way that in each case a redundant data line or a group of redundant data lines from the plurality of redundant data lines can be selected and can be connected to the at least one data distributor line.

REFERENCES:
patent: 4729117 (1988-03-01), Osaka
patent: 5227999 (1993-07-01), Ihara et al.
patent: 7251173 (2007-07-01), Lunde et al.
patent: 2002/0021600 (2002-02-01), Tsuji
patent: 2003/0028710 (2003-02-01), Shinohara et al.
patent: 2005/0232035 (2005-10-01), Miyakawa et al.
patent: 2006/0158924 (2006-07-01), Sekiguchi et al.

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