Configuration of a multi-level flash memory device

Details Configuration of a multi-level flash memory device Configuration of a multi-level flash memory device

2011-05-03

2011-05-03

Connolly, Mark (Department: 2116)

Electrical computers and digital processing systems: support

Digital data processing system initialization or configuration

C713S100000, C365S225700

Reexamination Certificate

active

07937576

ABSTRACT:
A multi-level flash memory device allows for a faster and more effective configuration of the operating parameters of the memory device for performing the different functioning algorithms of the memory The identification of an optimal configuration of the operating parameters of the memory device during testing is simplified by allowing for a one-time processing of configuration bits into algorithm-friendly data that are stored in an embedded ancillary random access memory at every power-on of the memory device This is done by executing a specific power-on algorithm code stored in the ancillary read only memory of the embedded microprocessor.

REFERENCES:
patent: 6023761 (2000-02-01), Ott
patent: 6134704 (2000-10-01), Adams et al.
patent: 6363008 (2002-03-01), Wong
patent: 6396759 (2002-05-01), Lesher
patent: 2003/0128590 (2003-07-01), Roohparvar
patent: 2004/0153900 (2004-08-01), Adams et al.
patent: 2004/0169254 (2004-09-01), Porter
patent: 2005/0270879 (2005-12-01), Imondi
patent: 2006/0023549 (2006-02-01), Son et al.
patent: 1453062 (2006-06-01), None

Affiliated with

Also associated with

Rating

Configuration of a multi-level flash memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Configuration of a multi-level flash memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Configuration of a multi-level flash memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2628286