Electronic digital logic circuitry – Superconductor – Tunneling device
Reexamination Certificate
1997-12-19
2001-02-13
Santamauro, Jon (Department: 2819)
Electronic digital logic circuitry
Superconductor
Tunneling device
C326S006000
Reexamination Certificate
active
06188236
ABSTRACT:
BACKGROUND
The present invention relates to a logic circuit arrangement which comprises signal input means and signal output means and flux quanta circuits comprising Josephson junctions. The flux quanta are used for carrying digital information.
The invention also relates to an arrangement for processing digital information comprising a number of logic elements, for example one or more of any combination of AND elements, OR elements and NOT elements each of which comprises input and output means and wherein single flux quanta are used as carriers of digital information.
Still further the invention relates to a method for stabilizing a logic circuit arrangement comprising a number of logic elements using flux quanta as information carriers.
Most common today are semiconductor-transistor-based integrated circuits. In semi-conductor logic, digital information is represented as voltage levels wherein the voltage level differences are determined by the electronic band gap. However, circuits based on semiconductor logic have a limited frequency of operation, i.e. it is not as high as could be desired for a number of applications and moreover the power dissipation is not as low as sometimes wanted or needed. This means that for a number of applications these values are not satisfactory.
Therefore a considerable amount of research within superconducting electronics has been done and among others a Rapid Single Flux Quantum (RSFQ) circuit family has been developed. This is based on superconductor integrated circuits and use Josephson junctions. Josephson junction technologies as such have been found advantageous for digital applications among others since the intrinsic switching speed of Josephson junctions is very high, such as around a few picoseconds. Moreover the power dissipation is low and the fabrication technologies are simple as compared to semiconductor transistors for corresponding devices.
In “RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Teraherz-Clock-Frequency Digital Systems” by K. K. Likharev and V. K. Semenov in IEEE Transactions on Applied Superconductivity, Vol 1, No 1, March 1991 a rapid single flux quantum (RSFQ) circuit family is presented where the logic is based on processing of single flux quanta wherein each digital information bit is represented by a single flux quantum or a fluxon. Therefore it is, particularly at higher frequencies, easily subjected to bit errors and SFQ-to-DC converters are required as input/output interfaces of an RSFQ chip. These converters serve the purpose of converting digital voltage levels to SFQ pulses and vice versa. The circuit is fully superconducting and the RSFQ logic requires a better magnetic field shielding the larger the circuit is in order to provide shielding from external magnetic fields.
In “SAIL High Temperature Superconductor Digital LOGIC: Improvements and Analyses” by S. M. Schwarzbek et al in IEEE Transactions on Applied Superconductivity, Vol. 3 No 1, March 1993, another SQUID based scheme, a so called Series Array Interferometer Logic, (SAIL) is provided. This logic has similarities with CMOS but it suffers from not being fast enough to compete with the fastest (at room temperature) semiconductor logic circuits.
Moreover flux flow transistor based logic (SFFT) is attractive in so far as it is dual to Field Effect Transistor (FET) logic, but it is inherently slow compared with the RSFQ logic and moreover the power dissipation is several orders of magnitude higher.
Moreover single flux quanta (SFQ) based circuits are known wherein the SFQs are used as digital carriers. However, then resistors are used for the interconnection of active elements. The circuit parameters of these devices have very small margins.
The above mentioned RSFQ logic, although being comparatively fast and having a comparatively low power dissipation, still leaves a lot to desire among others as far as speed and power dissipation is concerned. Moreover, elements based on this logic require additional equipment in order to interface with for example semiconductor circuits since digital voltage levels have to be converted to SFQ pulses and vice versa.
SUMMARY
Therefore a logic circuit arrangement is needed through which a still higher frequency of operation is enabled. Further still a logic circuit arrangement is needed wherein the power dissipation can be still further reduced.
Moreover a logic circuit arrangement is needed which can be easily interfaced with for example logic semiconductor circuits, particularly without requiring any additional components.
Generally a logical circuit arrangement is needed which is fast, easy and cheap to fabricate and which can easily be combined with other circuits or circuit arrangements of the same or different kinds.
Therefore a logic circuit arrangement as initially referred to is provided which comprises a number of Josephson junctions which are so arranged that mutual phase locking between the Josephson junctions is used for providing an output signal wherein a train of single flux quanta are used as digital information carriers. The logic digital information is represented as voltage levels (like in semiconductor logic) which facilitates interfacing with semiconductor circuits. The voltage level difference is here determined by the superconducting pairing energy which is given by the I
c
R
n
-product of the employed Josephson junctions which are shunted or unlatching, i.e. overdamped unlike in semiconductor logic wherein the voltage level differences are determined by the electronic band gap. This makes the arrangements according to the present invention easy to interface with semiconductor circuits. Particularly, in order to provide a still faster operation of the logic circuit arrangement, the Josephson junctions may be directly connected, i.e. without requiring any converting arrangements etc.
Particularly voltage supply means may be provided (connected), which advantageously are superconducting, to the circuit arrangement or particularly to every logic element of the circuit arrangement in order to provide a standard voltage output. According to various advantageous embodiments, the logic circuit element may comprise an AND element, an OR element and NOT element respectively or any combination thereof. Advantageously superconducting signal input/output means are used which even more particularly may be high temperature superconducting. Further advantageous embodiment are given by the appended subclaims.
Moreover an arrangement for processing of digital information as initially referred to is provided. The input/output means comprises superconductors, in a most advantageous embodiment high temperature superconductors, and to each logic element a voltage supplying means is connected for supplying every circuit or logic element with substantially the same voltage and wherein each logic element or circuit comprises a number of Josephson junctions which are so arranged that via phase locking of flux quanta between two or more Josephson junctions, the output signals are provided, the type of the signal being given by the particular Josephson junctions involved in the phase locking.
The Josephson junctions are shunted and a train of fluxons (at least two) acts as digital carrier. The effect of mutual phase locking between Josephson junctions is used, this is further described in A. K. Jaine, K. K. Likharev, J. E. Lukens et al, in “Mutual Phase-Locking in Josephson Junction Arrays”, Phys. Report., 109, 1984, pp 309-426 which is incorporated herein by reference. Mutual phase locking intrinsically requires more than one SFQ pulse and therefore a train of fluxons is used, the minimum being two fluxons. Physically each Josephson junction can be seen as a frequency oscillator and when two or more of said oscillators interact, this leads to a mutually phase locked state. Digital information is presented as one of a number of different dynamic states (particularly two) characteristic for the given kind of information. In order to use the phase locking more than one fluxon is required as
Burns Doane Swecker & Mathis L.L.P.
Le Don Phu
Santamauro Jon
Telefonaktiebolaget LM Ericsson
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