Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
1999-12-13
2001-11-06
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S747000, C438S750000, C438S754000, C438S756000
Reexamination Certificate
active
06313043
ABSTRACT:
This application is based on Japanese patent application No. 10-354849 filed on Dec. 14, 1998, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
a) Field of the Invention
The present invention relates to a manufacture method for a field emission element, and more particularly to a method of manufacturing a field emission element having a field emission cathode from the tip of which electrons are emitted.
b) Description of the Related Art
A field emission element emits electrons from a sharp tip of an emitter (electron emission cathode) by utilizing electric field concentration. For example, a flat panel display can be structured by using a field emitter array (FEA) having a number of emitters disposed on a support substrate. Each emitter controls the luminance of a corresponding pixel of the display.
In a field emission element, a gate electrode biased to a positive potential relative to an emitter is disposed near the emitter. This gate electrode applies an electric field to the tip of the emitter to emit electrons from the emitter.
Another gate electrode (converging electrode) is provided, if necessary, to converge electrons emitted from the emitter. When a negative potential is applied to this electrode, a repulsion force is exerted upon electrons emitted from the emitter and converges the electrons.
Wang et. al., “Novel Single- and Double-Gate Race-Track-Shaped Field Emitter Structures”, Proc. IEDM, 1996, pp. 313-316 discloses a race-track-shaped field emission element having two laterally disposed gate electrodes (double gate).
FIG. 21
is a cross sectional view of a race-track-shaped field emission element having two laterally disposed gate electrodes. A post gate
100
in a central area applies an electric field to the tip of an emitter electrode
101
to emit electrons from the emitter electrode
101
.
An outer second gate electrode
102
is provided to increase the intensity of the electric field near the tip of the emitter electrode
101
to lower the threshold voltage (at which the emitter electrode starts emitting electrons) between the post gate electrode and emitter electrode. With the element having such a structure, the distance between the emitter electrode and each gate electrode is determined by the thickness of each of insulating films
103
and
104
made of, for example, SiO
2
. Since the area of the emitter electrode is large, the density of emission current per unit area is small.
The vertical height of the emitter electrode
101
is susceptible to change greatly depending on etching time and etching conditions. If the unevenness in the vertical heights of emitter electrons of manufactured elements is large, the performances of manufactured elements become very different.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a manufacture method for a field emission element having a two-stage gate structure, capable of suppressing unevenness in vertical positions of the emitter electrode and gate electrodes.
It is another object of the present invention to provide a manufacture method for a field emission element capable of sharpening the tip of the emitter electrode.
It is still another object of the present invention to provide a manufacture method for a field emission element capable of easily controlling the vertical positions of first and second gate electrodes relative to the emitter electrode.
According to one aspect of the present invention, there is provided a method of manufacturing a field emission element, comprising the steps of: (a) forming a stacked layer on a substrate, the stacked layer including a first gate electrode with a gate hole and an insulating film with a hole communicating with the gate hole; (b) forming a side spacer made of insulating material on side wall of the gate hole and the hole to form an emitter portion forming recess, the emitter portion forming recess having a bottom defined by a surface of the substrate exposed via the gate hole and the hole and a side wall surface wholly or partially defined by a surface of the side spacer; (c) depositing an emitter electrode film covering a surface of the emitter portion forming recess and an upper surface of the stacked layer; (d) forming an emitter electrode having an emitter portion by removing the emitter electrode film on the bottom of the emitter portion forming recess, the emitter portion being made of the emitter electrode film deposited on the side wall surface of the emitter portion forming recess; (e) depositing a sacrificial film on a surface of the emitter electrode and on a bottom of the emitter portion forming recess; (f) depositing a second gate electrode film on a surface of the sacrificial film; and (g) exposing the gate hole and the emitter portion and removing a portion of the sacrificial film deposited on the surface of the emitter portion forming recess.
The emitter electrode film is deposited on the surface, including a side wall surface, of the emitter portion forming recess formed on and above the substrate. The annular emitter portion of the emitter electrode is formed by removing the emitter electrode film on the bottom of the emitter portion forming recess. Thereafter, the sacrificial film is deposited on the surface of the emitter electrode and on the bottom of the emitter portion forming recess, and then the second gate electrode film is formed on the surface of the sacrificial film.
The emitter portion forming recess can be formed by forming on the substrate the stacked layer of the first gate electrode with the gate hole and the insulating film with a hole communicating with the gate hole, and by forming the side spacer made of insulating material on the side walls of the gate hole and hole.
By forming the first gate electrode, emitter electrode and second gate electrode by the method described above, unevenness in vertical positions of manufactured emitter electrodes (emitter portions) and second gate electrodes can be suppressed. It becomes easy to control the vertical positions of the first and second gate electrodes relative to the emitter electrodes (emitter portions). Accordingly, manufacture yield can be improved, degree of design freedom can be increased, and optimization can be made easy.
According to embodiments of the invention, it is easy to sharpen the tip of the emitter electrode, so that the current quantity per unit area can be increased.
If the sacrificial film or insulating film between the emitter electrode and second gate electrode is formed by sputtering or evaporation providing poor step coverage than thermal CVD, it is possible to lower the electric capacitance between the emitter electrode and second gate electrode, and so the dielectric breakdown voltage can be raised. If the emitter electrode film is formed by sputtering or evaporation providing poor step coverage, the emitter tip can be made more sharp and the emitter wiring resistance can be lowered.
According to embodiments of the invention, expensive photo processes are used less and the manufacture cost can be lowered. High throughput and yield can be achieved. Specifically, the first gate can be formed by one photo process, and the emitter electrode and second gate electrode can be formed by an etch-back process.
REFERENCES:
patent: 5334908 (1994-08-01), Zimmerman
patent: 5371041 (1994-12-01), Liou et al.
patent: 5599749 (1997-02-01), Hattori
patent: 5880554 (1999-03-01), Liu
patent: 10-188786 (1998-07-01), None
“Novel Single-and Double-Gate Race-Track-Shaped Field Emitter Structures,” IEEE, 0-7803-3393-4, IEDM 96-313, Wang et al., 1996.
Ostrolenk Faber Gerb & Soffen, LLP
Tran Binh X.
Utech Benjamin L.
Yamaha Corporation
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