Methods of forming isolation trenches including damaging a...

Details Methods of forming isolation trenches including damaging a... Methods of forming isolation trenches including damaging a...

1999-06-01

2001-12-11

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S425000

Reexamination Certificate

active

06329266

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of integrated circuits and more particularly to methods of forming isolation trenches for integrated circuit devices.
BACKGROUND OF THE INVENTION
As Dynamic Random Access Memory (DRAM) devices have become more highly integrated, device isolation methods have changed from the conventional LOCOS (local oxidation of silicon) technique to the STI (shallow trench isolation) technique. In case of the STI techniques, however, expansion of the oxide layer in the trench inner walls may cause a shallow pit in an active region. As a result, leakage currents may increase in the active region of a semiconductor substrate.
To reduce the above-mentioned problem, a nitride liner has been used as an oxidation masking layer to reduce subsequent oxidation of the trench inner wall. With the use of the nitride liner, the shallow pit can be reduced. The nitride liner, however, may be etched to a point below a surface of the semiconductor substrate (i.e., the nitride liner may be dented) during etching of an active nitride masking layer when using phosphoric acid. Thus, the dented nitride liner may cause a stringer residue in the subsequent step of etching a gate poly.
To reduce the described problems, a shallow isolation trench with a nitride liner having a thickness of less than 50 Å has been proposed. See, for example, U.S. Pat. No. 5,447,884, the disclosure of which is hereby incorporated herein in its entirety by reference.
The method mentioned above includes the steps of: depositing a protective (masking) layer containing at least one layer of nitride on the semiconductor substrate; etching through the protective layer to form a set of isolation mask apertures; etching through the set of isolation mask apertures to form a set of isolation trenches; depositing a conformal liner of nitride having a thickness less than 50 Å; depositing a CVD layer of oxide having a thickness sufficient to fill the set of isolation trenches; removing the portion of the CVD layer of oxide outside the set of isolation trenches to expose the at least one layer of nitride; and stripping the at least one layer of nitride in phosphoric acid. According to above method, the denting of the conformal nitride liner may be reduced by using a very thin nitride liner as an oxidation masking layer. The conformal nitride liner, however, may be so thin that it is insufficient to prevent oxidation of the trench inner wall.
Therefore, a method is needed which not only reduces denting the nitride liner but also reduces oxidation of the interior walls of the trench.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide improved methods of forming isolation trenches.
This and other objects are provided according to the present invention by forming a trench mask layer on a surface of a semiconductor substrate wherein a portion of the semiconductor substrate is exposed through the trench mask layer, and forming an isolation trench in the exposed portion of the semiconductor substrate. A nitride liner is formed on surfaces of the isolation trench, a trench isolation layer is formed on the nitride liner wherein the trench isolation layer fills the trench, and the trench mask layer is damaged. The damaged trench mask layer is then stripped so that the surface of the semiconductor substrate is exposed. By damaging the trench mask layer before stripping the trench mask layer, the time needed to strip the trench mask layer can be reduced, and damage to the nitride liner can be reduced. Accordingly, the isolation characteristics of the isolation trench can be improved.
In particular, the trench mask layer can include a nitride trench mask layer and the step of damaging the trench mask layer can include damaging the nitride trench mask layer thereby weakening Si—N bonds of the nitride trench mask layer. More particularly, the step of damaging the trench mask layer can include implanting ions into the trench mask layer. For example, ions selected from the group of phosphorus (P), arsenic (As), boron (B), argon (Ar), and silicon (Si) can be implanted at a dose in the range of approximately 1×10
10
cm
−2
to approximately 1×10
17
cm
−2
, at an acceleration energy in the range of approximately 10 keV to approximately 1000 keV.
Alternately, the step of damaging the trench mask layer can include plasma treating the trench mask layer. For example, the plasma treatment can be performed using an element selected from the group of xenon (Xe), krypton (Kr), and argon (Ar) at a power in the range of approximately 10 W to approximately 5000 W at a pressure in the range of approximately 1×10
4
Torr to approximately 700 Torr.
In addition, the step of forming the trench mask layer can include forming a pad oxide layer on the surface of the substrate, forming a nitride layer on the pad oxide layer opposite the substrate, and patterning the pad oxide and nitride layers to provide the trench mask layer. Moreover, the step of forming the isolation trench can include etching the exposed portion of the substrate. Furthermore, the step of forming the nitride liner may be preceded by the step of forming an oxide layer on the surfaces of the isolation trench. The formation of the oxide layer can reduce crystal damage in the substrate resulting from the etching of the trench.
According to the present invention, denting of the nitride liner can be reduced by damaging the trench mask layer before stripping the trench mask layer. Accordingly, isolation characteristics of the isolation trench can be improved. In addition, the time needed to strip the trench mask layer can be reduced.


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