Method of forming trench isolation structure

Details Method of forming trench isolation structure Method of forming trench isolation structure

1999-04-26

2001-02-20

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S700000

Reexamination Certificate

active

06191002

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor device fabrication and more particularly, to a method of forming a trench isolation structure provided in a semiconductor device, which uses spin coating.
2. Description of the Prior Art
The isolation structure of a semiconductor device is, in general, provided to electrically isolate a semiconductor element or elements such as transistors, resistors, and capacitors in an active region from other semiconductor element or elements in a neighboring active region on a same semiconductor substrate.
In recent years, the need to narrow the isolation regions has been becoming stronger with the increasing level of integration of Large-Scale Integrated circuits (LSIs). Thus, with the well-known LOcal Oxidation of Silicon (LOCOS) method where the isolation regions are formed by producing a patterned isolation dielectric on a main surface of a semiconductor substrate of silicon (Si) due to selective oxidation, the isolation regions corresponding to a desired integration level have been being unable to be realized.
To respond to the need, the “trench isolation structures” has been often used, in which neighboring active regions are electrically isolated from one another by an isolation dielectric filled in trenches formed vertically into a semiconductor substrate. The isolation dielectric is typically made of silicon dioxide (SiO
2
). The trenches are formed in the substrate according to a desired pattern of isolation regions and then, the isolation dielectric is selectively formed so as to fill the trenches.
The trench isolation structure makes it possible to decrease the width of the isolation trenches (i.e., the isolation regions) compared with the isolation regions realized by the conventional LOCOS method. Thus, the trench isolation structure can produce narrower isolation regions corresponding to a recent, high integration level of LSIs.
A conventional method of forming the trench isolation structure is explained below with reference to
FIGS. 1A
to
1
E. In this method, it is needless to say that a lot of isolation trenches are formed in a semiconductor substrate to electrically isolate adjoining active regions from one another. However, only one of the trenches is illustrated to isolate two adjoining ones of the active regions and explained below for the sake of simplification of description.
It is known that Chemical Vapor Deposition (CVD) is effective to form selectively an isolation dielectric of SiO
2
to fill fine isolation trenches (e.g., approximately 0.1 &mgr;m in width), because CVD produces SiO
2
with a good filling property of the trenches, in other words, SiO
2
produced by CVD (i.e., CVD-SiO
2
) has a good trench-filling property. In the conventional method explained below with reference to
FIGS. 1A
to
1
E, high-density plasma CVD, which produces SiO
2
with a better trench-filling property, is used.
First, a SiO
2
film
105
with a thickness of approximately 20 nm, which serves as a pad oxide, is formed on a main surface of a single-crystal Si substrate
101
by thermal oxidation of the substrate
101
. Then, a silicon nitride (Si
3
N
4
) film
106
with a thickness of approximately 200 nm is formed on the SiO
2
film
105
by reduced-pressure CVD. The Si
3
N
4
film
106
is used as a mask for an isolation trench. The state at this stage is shown in FIG.
1
A.
Next, after a photoresist film (not shown) is formed on the Si
3
N
4
film
106
by coating, the photoresist film is patterned by popular exposure and development processes. The patterned photoresist film has a pattern corresponding to the plan shape of a desired isolation trench. In other words, the photoresist film has a window corresponding to the isolation trench to be formed.
Using the patterned photoresist film as a mask, the Si
3
N
4
film
106
and the SiO
2
film
105
are successively patterned by dry etching. Thus, a hole
118
is formed to penetrate through the Si
3
N
4
and SiO
2
films
106
and
105
. The hole
118
, which has a plan shape corresponding to the window of the photoresist film, is reached the main surface of the substrate
101
, as shown in FIG.
1
B.
After removing the photoresist film, the main surface of the substrate
101
is selectively and vertically removed by dry etching using the Si
3
N
4
film
106
as a mask, thereby forming an isolation trench
103
in the substrate
101
, as shown in FIG.
1
C. The isolation trench
103
has a plan shape corresponding to the window of the photoresist film. For example, the trench
103
has a width of 0.1 &mgr;m and a depth of 0.5 &mgr;m, resulting in an aspect ratio of 5 (=0.5/0.1).
Subsequently, as shown in
FIG. 1D
, a SiO
2
film
113
is formed on the Si
3
N
4
film
106
to cover the whole main surface of the substrate
101
. The formation process of the SiO
2
film
113
is carried out by high-density plasma CVD that produces SiO
2
with a better trench-filling property. As a result, the SiO
2
film
113
is deposited on the Si
3
N
4
film
106
and at the same time, it is deposited in the trench
103
and the penetrating hole
118
. The state at this stage is shown in FIG.
1
D.
The SiO
2
film
113
is then polished by Chemical Mechanical Polishing (CMP) until the surface of the underlying Si
3
N
4
film
106
is exposed. Thus, the SiO
2
film
113
is removed while the part of the SiO
2
film
113
located under the surface of the Si
3
N
4
film
106
is left and at the same time, the surface of the Si
3
N
4
film
106
is planarized.
Finally, the remaining Si
3
N
4
film
106
and the underlying SiO
2
film
105
are successively removed by wet etching. As a result, as shown in
FIG. 1E
, only the part of the SiO
2
film
113
located under the surface of the Si
3
N
4
film
106
is left. The remaining part of the SiO
2
film
113
, almost all of which is located in the trench
103
and a top of which is protruded from the main surface of the substrate
101
by a height corresponding to the total thickness of the films
106
and
105
, serves as an isolation dielectric. The trench
103
and the remaining SiO
2
film
113
constitute a trench isolation structure
102
that isolates electrically two adjoining active regions A
101
and A
102
.
With the conventional method of forming a trench isolation structure shown in
FIGS. 1A
to
1
E, a void (i.e., unfilled part)
114
tends to be formed in the remaining SiO
2
film
113
(i.e., the isolation dielectric) during the process of forming the SiO
2
film
113
by high-density plasma CVD, as shown in FIG.
1
D. This is caused by the fact that the isolation trench
103
is narrow in width and high in aspect ratio. In this case, even if high-density plasma CVD, which produces SiO
2
with a better trench-filling property, is used for forming the SiO
2
film
113
, the whole trench
103
is difficult to be filled with the SiO
2
film
113
.
If the void
114
exists in the isolation dielectric
113
, not only the mechanical strength of the trench isolation structure
102
but also the electrical isolation capability thereof will degrade. Also, there is a possibility that the void
114
appears on the main surface of the substrate
101
after the CMP process of the SiO
2
film
113
, as shown in
FIG. 1E
in this case, the exposed void
114
will cause a problem that overlying wiring layers or lines (which will be formed in subsequent processes) are broken or cut.
As an improvement of the above-described conventional method shown in
FIGS. 1A
to
1
E, a method using a different condition of the high-density plasma CVD has been developed. In this method, the void
114
is prevented from being generated due to the enhanced plasma-etching action.
With the improved method using the different CVD condition, although the void
114
can be prevented, the neighborhood of the hole
118
of the films
106
and
105
and the top of the isolation trench
103
tend to be etched by the enhanced plasma-etching action. As a result, as shown in
FIG. 2
, the sidewalls of the hole
118
an

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