Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-09-01
2001-10-09
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C430S005000, C378S035000, C382S144000
Reexamination Certificate
active
06301698
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
This invention relates to the logical generation of mask patterns for outrigger type attenuating or 100% transmittance phase shifting masks.
(2) Description of the Related Art
As critical dimensions become smaller phase shifting masks are more frequently used for forming contact holes in integrated circuit wafers.
FIGS. 1 and 2
show a phase shifting mask used for forming contact or via holes.
FIG. 1
shows a top view of the mask
20
showing contact holes
12
formed in the phase shifting material. The phase shifting material can be attenuating phase shifting material or material having 100% transmittance.
FIG. 2
shows a cross section view of the mask taken along line
2
-
2
′ of FIG.
1
.
FIG. 2
shows a layer of attenuating or 100% transmittance phase shifting material
14
formed on a transparent mask substrate
16
. Holes
12
corresponding contact holes are formed in the attenuating phase shifting material. Masks of this type work well but can have a problem due to side lobe effect.
FIGS. 3 and 4
show an outrigger type phase shifting mask
10
used for forming contact or via holes which can avoid the problem of side lobe effect. The
10
mask shown in
FIGS. 3 and 4
uses contact hole openings
12
in an opaque background
18
with outrigger bars
14
formed of phase shifting material on all four sides of the contact hole opening.
FIG. 3
shows the top view of the mask
10
.
FIG. 4
shows a cross section of the mask
10
along line
4
-
4
′ of FIG.
3
and shows the opaque background
18
and the phase shifting outrigger bars
14
formed on a transparent mask substrate
16
. The phase shifting material can be attenuating phase shifting material or can have 100% transmittance. The mask of
FIGS. 3 and 4
provides good image quality for the contact hole formation and also avoids the problem of side lobe effect.
U.S. Pat. No. 5,538,833 to Ferguson et al. describes the use of a process of phase edge lithography in the fabrication of integrated circuit chips in which chrome images are biased on a phase edge of a phase shift mask and the mask is overexposed to compensate for bias.
U.S. Pat. No. 5,702,848 to Spence describes masks used in integrated circuits where pattern intersection regions are divided into categories of stacks and different phase assignment rules are employed for the different stacks.
U.S. Pat. No. 5,537,648 to Liebman et al. describes a method implemented in a computer aided design system to automatically generate phase shifted masks. The method uses a series of basic geometric operations to design areas to design areas requiring phase assignment, resolve conflicting phase assignments, and eliminate unwanted phase edges.
U.S. Pat. No. 5,807,649 to Liebman et al. describes a lithographic patterning method using a phase shift trim mask.
U.S. Pat. No. 5,308,741 to Kemp describes a lithographic method using double exposures, physical mask shifting, and light phase shifting to form masking features on a substrate masking layer.
SUMMARY OF THE INVENTION
Outrigger type phase shifting masks, using attenuating or 100% transmittance phase shifting materials, are useful for achieving good image resolution while avoiding side lobe effect problems. This avoidance of the side lobe effect is even more important with phase shifting material having increased transmittance. As the usefulness of these phase shifting masks increases it becomes important to generate the mask patterns efficiently.
It is the principle objective of this invention to provide a method of generating outrigger type phase shifting masks using logic operations during the computer processing of the design data used for mask generation.
This objective is achieved by changing the outrigger type mask
10
shown in
FIGS. 3 and 4
to the Outrigger type mask
30
shown in
FIGS. 5 and 6
.
FIG. 5
shows a top view of the mask
30
and
FIG. 6
shows a cross section of the mask
30
taken along line
6
-
6
′ of FIG.
5
. The outrigger type mask of this invention has contact holes
12
formed in a background of opaque material
18
. An outrigger border
14
of attenuating or 100% transmittance phase shifting material is formed around the contact holes
12
. As shown in
FIG. 6
the mask is formed on a transparent mask substrate
16
.
A first data set, P, representing the pattern of contact holes in a computer aided design system and a second data set, B, representing the opaque background of the mask are provided for the generation of the mask. The first data set, P, is logically added to the second data set, B, forming a third data set, P+B, representing contact holes in an opaque background. In order to form the outrigger type mask a fourth set, C
1
, representing a first correction and a fifth data set, C
2
, representing a second correction are provided. The fourth data set, C
1
, and the fifth data set, C
2
, are each logically subtracted from the third data set, P+B, forming a sixth data set, (P+B)−C
1
, and a seventh data set, (P+B)−C
2
. The seventh data set, (P+B)−C
2
, is then logically subtracted from the sixth data set, (P+B)−C
1
, forming a final data set which a represents the final mask pattern. The logical addition and logical subtraction operations are performed in a computer using software used to perform the computer aided mask generation.
The final data set is used to form the mask shown in
FIGS. 5 and 6
and the operations leading to the final data set will later be described in greater detail. In this invention data sets representing a first correction and a second correction are combined with data sets representing the contact hole pattern and an opaque background pattern are combined to achieve a data set which can be used to generate the outrigger mask shown in FIGS.
5
and
6
.
REFERENCES:
patent: 5308741 (1994-05-01), Kemp
patent: 5537648 (1996-07-01), Liebmann et al.
patent: 5538833 (1996-07-01), Ferguson et al.
patent: 5658695 (1997-08-01), Choi
patent: 5682323 (1997-10-01), Pasch et al.
patent: 5702848 (1997-12-01), Spence
patent: 5795685 (1998-08-01), Liebmann et al.
patent: 5807649 (1998-09-01), Liebmann et al.
patent: 5920487 (1999-07-01), Reich et al.
patent: 5978501 (1999-11-01), Badger et al.
patent: 5991006 (1999-11-01), Tsudaka
patent: 6110647 (2000-08-01), Inoue et al.
patent: 6212671 (2001-04-01), Kanehira et al.
patent: 6221539 (2001-04-01), Kotani et al.
Kahn, “IC layout and manufacturability: critical links and design flow implications”, Proceedings of Twelfth International Conference on VLSI Design, Jan. 7, 1999. pp. 100-105.*
Liu et al., “Computer-aided phase shift mask design with reduced complexity”, IEEE Transactions on Semiconductor Manufacturing, vol. 9, No. 2, May 1996, pp. 170-181.*
Pugh et al., “Impact of high resolution lithography on IC mask design”, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, May 11, 1998, pp. 149-153.
Lin Chia-Hui
Tzu San-De
Ackerman Stephen B.
Kik Phallaka
Prescott Larry J.
Saile George O.
Smith Matthew
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