Method for manufacturing a panel for a liquid crystal...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S149000, C438S151000, C438S609000, C349S138000

Reexamination Certificate

active

06300152

ABSTRACT:

BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a method for manufacturing a liquid crystal display (LCD) panel.
(b) Description of the Related Art
An LCD is one of the most popular flat panel displays (FPDs). The LCD has two panels having two kinds of electrodes and wires for generating electric fields and a liquid crystal layer interposed therebetween. The intensity of the electric field applied to the liquid crystal layer controls the transmittance of incident light.
The wires and electrodes are formed by depositing and patterning conductive thin films. Insulating layers or passivation layers of silicon oxide (SiO
2
) or silicon nitride (SiNx) are formed between the wires or between the wires and electrodes to insulate them. An organic insulating layer consisting of materials such as benzocyclobutene (BCB), perfloucyclobutene (PFCB), and acrylic resin has recently been used as a passivation layer to increase the aperture ratio of the LCD and flatness of the layer. As these organic insulating layers have photosensitivity, neither an etching process nor another photoresist layer is needed to pattern these organic insulating layers. Therefore, the overall manufacturing process can be simplified.
However, an organic insulating layer is softer than the conventional insulating layer such as a SiNx layer. Therefore, when forming a contact hole, residues of the organic insulating layer tend to remain. The residues disturb the contact between the two conducting layers through the contact hole and cause a high contact resistance.
Additionally, an organic insulating layer does not as strongly adhere to a transparent conducting layer formed by indium tin oxide (ITO) sputtering. Therefore, the ITO layer may be easily undercut or over-etched when forming a pixel electrode. As a result, the critical dimensions of the eletrodes become irregular.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to reduce a contact resistance between the metal layer and the transparent electrode by removing residues in the contact hole.
It is the other object of the present invention to prevent undercutting and over-etching of the transparent conducting layer by strengthening the adhesion between the organic insulating layer and the transparent conducting layer.
These and other objects are provided, according to the present invention, by treating the organic insulating layer with argon plasma or with oxygen plus argon plasma.
According to the present invention, an organic insulating layer is formed on an insulating substrate and is treated with a plasma. By this plasma treatment, surface roughness of the organic insulating layer is increased. Next, a transparent conducting layer is deposited on the organic insulating layer and patterned. At this time, argon gas may be used as a plasma gas.
The organic insulating layer may also be treated with oxygen plasma before the plasma treatment for increasing roughness.
A gate wire including gate lines and gate electrodes is formed on an insulating substrate. A semiconductor layer of amorphous silicon is formed to overlap and to be insulated from the gate electrode. A data wire including data lines, source electrodes, and drain electrodes is formed. At this time, the data lines cross and are insulated from the gate lines. The source electrodes are connected to the data lines and overlap a part of the semiconductor layer. The drain electrodes overlaps a part of the semiconductor layer opposite to the source electrodes. An organic insulating layer is coated and patterned to form contact holes exposing the drain electrodes. A transparent conducting layer is deposited and patterned to form pixel electrodes connected to the drain electrode through the contact holes. At this time, a pixel electrode is formed in a pixel area defined by the crossing of the gate lines and the data lines. The boundary of the pixel electrodes preferably overlaps the gate lines and the data lines.
The surface of the drain electrode exposed through a contact hole may be treated by argon sputtering. This treatment is particularly effective when the drain electrode is made of chromium (Cr) so that a chromium oxide layer having high resistance is apt to be formed on the surface.
Data pads connected to ends of the data lines may be formed. A data pad is exposed through a contact hole of the organic insulating layer. The data pads are preferably treated by argon sputtering along with the drain electrodes. A redundant data pad of the transparent conducting layer may be formed to contact with a data pad.
The semiconductor layer may be formed of polysilicon. At this time, the semiconductor layer preferably includes a source and drain region doped with impurities and a channel region that is not doped.
A color filter pattern and a black matrix pattern are formed on the insulating substrate. A transparent conducting layer is formed on the color filter and the black matrix pattern. At this time, the transparent conducting layer may be etched to form an aperture pattern.
Color filters may be formed on a thin film transistor array panel. At this time, the color filters are patterned to form contact holes exposing the drain electrodes. The color filters and the contact holes are treated by plasma to remove residue and to increase surface roughness. Then, a transparent conducting layer is deposited on the color filters.
When an organic passivation layer is coated on the color filters, the organic passivation layer is patterned along with the color filters to expose the drain electrodes. The contact hole and the organic passivation layer are treated by plasma to remove residue of the color filters and the organic passivation layer and to increase surface roughness of the organic passivation layer. Then, a transparent conducting layer is deposited on the organic passivation layer.
At this time, the plasma treatment may include an argon plasma treatment only, or an oxygen plasma treatment as a first process and an argon plasma treatment as a second process.
A thin passivation layer may also be formed between the color filters and the semiconductor layer.


REFERENCES:
patent: 5157527 (1992-10-01), De Keyser et al.
patent: 5583676 (1996-12-01), Akiyama et al.
patent: 5650867 (1997-07-01), Kojima et al.
patent: 5883682 (1999-03-01), Kim et al.
patent: 5917571 (1999-06-01), Shimada
patent: 5950077 (1999-09-01), Ohue et al.
patent: 6188452 (2001-02-01), Kim et al.
patent: 63-168624-A (1988-07-01), None
patent: 11-337973-A (1999-12-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing a panel for a liquid crystal... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing a panel for a liquid crystal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a panel for a liquid crystal... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2593569

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.