Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-01-06
2001-11-06
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S300000, C257S303000, C257S304000, C257S306000, C257S310000
Reexamination Certificate
active
06313495
ABSTRACT:
BACKGROUND
1. Technical Field
This disclosure relates to stack capacitors for semiconductor devices and more particularly, to a high conductivity plug for stack capacitors.
2. Description of the Related Art
Semiconductor memory cells include capacitors accessed by transistors to store data. Data is stored by as a high or low bit depending on the state of the capacitor. The capacitor's charge or lack of charge indicates a high or low when accessed to read data, and the capacitor is charged or discharged to write data thereto.
Stacked capacitors are among the types of capacitors used in semiconductor memories. Stacked capacitors are typically located on top of the transistor used to access a storage node of the capacitor as opposed to trench capacitors which are buried in the substrate of the device. As with many electrical devices, high conductivity is beneficial for performance characteristics of stacked capacitors.
In semiconductor memories, such as dynamic random access memories (DRAM), high dielectric constant capacitor formation processes include deposition of highly dielectric materials. In one type of high dielectric constant capacitors, a layer of high dielectric constant materials, such as barium strontium titanium oxide (BSTO), is deposited in an oxidized atmosphere.
Referring to
FIGS. 1A and 1B
, a structure
2
with stacked capacitors is shown. Stacked capacitors
3
include two electrodes a top electrode or storage node
4
, usually platinum (Pt) and an electrode
12
separated by a dielectric layer
18
. An access transistor
5
includes a gate
6
which when activated electrically couples a bitline
7
through a bitline contact
8
to a plug
14
. Plug
14
connects to electrode
12
through a diffusion barrier
16
which stores charge in electrode
12
.
A partial view of a conventional stacked capacitor
10
is shown in FIG
1
B. Stacked capacitor
10
includes electrode
12
, preferably formed of platinum (Pt). Electrode
12
is separated from plug
14
by diffusion barrier
16
. Plug
14
is preferably polycrystalline silicon (polysilicon or poly). During processing, dielectric layer
18
is deposited on electrode
12
. Dielectric layer
18
is typically a material with a high dielectric constant, for example BSTO. During the deposition of dielectric layer
18
, oxide layers
20
and
21
form which are detrimental to the performance of the stacked capacitor. Diffusion barrier
16
is employed to prevent the formation of oxide layer
21
.
Oxide layers
20
and
21
form if:
(a) silicon diffuses through diffusion barrier
16
and reacts with oxygen to form oxide
20
between diffusion barrier
16
and electrode
12
;
(b) diffusion barrier
16
materials simply react with oxygen; and
(c) oxygen diffuses through diffusion barrier
16
and reacts with plug
14
to form oxide layer
21
between diffusion barrier
16
and plug
14
.
Oxide layers
20
and
21
reduce the capacitance of stacked capacitor
10
. Therefore, a need exists for improving capacitance of stacked capacitors by eliminating oxide layers adjacent to a barrier layer formed as a result of processing and diffusion. A further need exists for a method of increasing conductivity of a plug used in stacked capacitors.
SUMMARY OF THE INVENTION
The present invention includes a method of improving conductivity between an electrode and a plug in a stacked capacitor where an oxide has formed therebetween. The method includes the steps of bombarding the oxide with ions and mixing the oxide with materials of the electrode and the plug to increase a conductivity between the electrode and the plug.
In particularly useful methods of improving conductivity, the step of bombarding may include the step of bombarding by ion implantation. The step of bombarding may also include the step of bombarding the oxide with germanium ions. The step of bombarding preferably includes the step of adjusting an angle of incident ions to provide for improved mixing. The step of bombarding may further include the step of adjusting an energy and dose of incident ions to provide for improved mixing. The electrode preferably includes platinum, and the plug preferably includes polysilicon.
A method of forming a diffusion barrier within an electrode in a stacked capacitor includes the steps of providing a stacked capacitor having a plug coupled to an electrode, and bombarding the electrode with ions to form the diffusion barrier within the electrode such that the diffusion barrier is electrically conductive.
In alternate methods of forming a diffusion barrier within the electrode, the step of bombarding may include the step of bombarding by plasma doping or by plasma immersion ion implantation. The step of bombarding may include the step of bombarding with nitrogen ions. The step of bombarding may include the step of adjusting an energy and dose of incident ions to provide a location of the diffusion barrier within the electrode. The step of depositing a conductive layer over the electrode may also be included. The electrode may include platinum.
A stacked capacitor in accordance with the present invention includes an electrode, a plug for electrically accessing a storage node, the plug being coupled to the electrode and a barrier layer disposed within the electrode for preventing diffusion of materials which reduce conductivity between the electrode and the plug.
In alternate embodiments of the stacked capacitor, the diffusion barrier includes nitrogen. The diffusion barrier may have a thickness that prevents diffusion and permits electrical conduction therethrough. The diffusion barrier is preferably between about 100 Å and about 500 Å in thickness. An additional diffusion barrier may be included between the plug and the electrode. The additional diffusion barrier may include TaSiN. The electrode may include platinum, and the plug may include polysilicon.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
REFERENCES:
patent: 5828129 (1998-10-01), Roh
Hoepfner Joachim
Shen Hua
Paschburg Donald B.
Siemens Aktiengesellschaft
Wojciechowicz Edward
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