Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-08-02
2000-05-16
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438655, 438592, 438636, 438682, 438786, H01L 2144, H01L 214763
Patent
active
060637048
ABSTRACT:
A process flow for forming a silicided polysilicon feature avoids removal of the SiON dielectric anti-reflective coating (DARC) used to pattern the polysilicon. Instead, following polysilicon formation and etching aided by the DARC, the DARC is modified to enrich its silicon content. This modification may take the form of densification by annealing in conjunction with formation of a seal oxide, densification by annealing in an inert ambient prior to exposure to oxidizing conditions, or direct ion implantation of semiconductor material into the DARC. As a result of this modification, the DARC becomes sufficiently enriched in semiconductor material to permit formation of silicide. Thermal densification of DARC during formation of a seal oxide is sufficient to permit formation of silicide upon exposure to a silicide-forming metal. In this embodiment however, implantation of semiconductor material prior to silicide formation is generally necessary to permit silicidation of a thin oxide layer created between DARC and polysilicon as a by-product of the prior thermal seal oxidation step.
REFERENCES:
patent: 5580701 (1996-12-01), Lur et al.
patent: 5904564 (1999-05-01), Park
patent: 5956584 (1999-09-01), Wu
Chen, I., et al., "Microelectronic Device and Multilevel Inerconnection Technology II", SPIE vol. 2875, pp. 188-200 (1996).
Maa, J., et al., "Reaction of Amorphous Silicon with Cobalt and Nickel Silicides Before Disilicide Formation", Materials Research Society, Symp. Proc. vol. 402, pp. 185-190, (1996).
Osburn, C.M., et al., "Metal Silicides: Active Elements of ULSI Contacts", Journal of Electronic Materials, vol. 25, No. 11, pp. 1725-1739 (1996).
Sakai, I., et al., "A New Salicide Process (PASET) for Sub-half Micron CMOS", Symposium on VLSI Technology Digest of Technical Papers, pp. 66-67, (1992).
Wu, J., et al., "Comparing Inorganic and Organic BARC for a Deep Sub-Micron Gate Patterning & Etch", Proc. SPIE Vo. 3332, pp. 696-709, (1998).
Bowers Charles
Lee Hsien-Ming
National Semiconductor Corporation
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