Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

2000-03-15

2001-12-25

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S623000, C438S780000, C438S793000, C438S794000

Reexamination Certificate

active

06333278

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a semiconductor device and a manufacturing method thereof and, more specifically, to a structure of an interlayer insulating film and a method for forming the structure.
BACKGROUND ART
As for an interlayer insulating film of a semiconductor device, a silicon oxide film formed by a chemical vapor deposition (CVD) by using a silicon compound, such as a silane gas (SiH
4
) and hydrogen peroxide (H
2
O
2
), has a high flowability and can fill in very fine spaces of less than 0.25 (&mgr;m between conducting lines. Further, the silicon oxide film formed by the above method exhibits a self-planarization effect. Due to these advantages, the above method is increasingly being used as a method for planarization of interlayer insulating film of a next-generation to replace the conventional methods such as a spin on glass method (SOG). For details, refer to, for instance, “Novel Self-planarizing CVD Oxide for Interlayer Dielectric Applications,” Technical Digest of IEDM '94.
According to the above method, a silicon oxide film is formed by a process that is expressed by the chemical formulae shown below. First, silanol (Si(OH)
4
) is formed by an oxidizing reaction involving silane gas (SiH
4
) and hydrogen peroxide (H
2
O
2
) (see chemical formulae (1-1) to (1-3)). Then, a silicon oxide (Sio
2
) is produced from silanol by hydrolysis or a dehydropolymerization reaction with application of thermal energy (see chemical formula (2)). A silicon oxide film is formed when the above reactions are effected on a substrate.
SiH
4
+2H
2
O
2
→Si(OH)
4
+2H
2
  (1-1)
SiH
4
+3H
2
O
2
→Si(OH)
4
+2H
2
O+H
2
  (1-2)
SiH
4
+4H
2
O
2
→Si(OH)
4
+4H
2
O  (1-3)
nSi(OH)
4
→nSiO
2
+2nH
2
O  (2)
FIG.
7
(
a
)-FIG.
7
(
c
) schematically show a conventional flow for forming an interlayer insulating film according to the above method. This flow will be described below with reference to FIG.
7
(
a
)-FIG.
7
(
c
).
Referring to FIG.
7
(
a
), reference numeral
1
denotes a semiconductor device substrate including a silicon substrate, a device, and an insulating film formed thereon (not separately shown). Aluminum interconnections
2
are formed on the substrate
1
.
An interlayer insulating film is formed in the following manner. A first plasma oxide film
3
is formed on the substrate
1
on which the aluminum interconnections
2
have been formed. Then, a silicon oxide film
4
a
is formed so as to cover the first plasma oxide film
3
by the above-described CVD method using a silane gas (SiH
4
) and hydrogen peroxide (H
2
O
2
). Finally, a second plasma oxide film
5
is formed so as to cover the entire structure, to thereby form a flat interlayer insulating film.
A silicon oxide film, formed by the CVD method using a silane gas (SiH
4
) and hydrogen peroxide (H
2
O
2
), can fill in very fine spaces between conducting lines and achieves superior self-planarization, because the silanol that is produced during the film formation process exhibits superior flowability.
A silicon oxide produced through the formation of silanol in the above manner has a relative dielectric constant of 4.0-5.0. With recent miniaturization of devices, the delay of the conducting lines due to the capacitance of an interlayer insulating film is becoming a more serious problem. Therefore, for the future processes to form an interlayer insulating film, a reduction in capacitance is an important objective. In particular, it is important to reduce the capacitance of fine spaces of less than 0.3 &mgr;m between conducting lines. For this purpose, an interlayer insulating film is needed which has a small relative dielectric constant and which is superior in embeddability and planarization characteristics.
An organic spin-on-glass (SOG) film containing a methyl radical is known as a conventional film that satisfies the above requirements. The molecular structure of this material is shown in FIG.
8
. The Si—O network is divided by terminating one bond of some silicon atoms by a methyl radical, whereby the film density is lowered and, in turn, the relative dielectric constant is reduced. For details, refer to, for instance, “A New Methylsilsesquioxane Spin-on-Polymer,” Proceedings of The 48th Symposium on Semiconductors and Integrated Circuits Technology and “New Reflowable Organic Spin-on-Glass for Advanced Gap-filling and Planarization,” Proceedings of VMIC Conference 1994.
To reduce the dielectric constant with this material, however, it is necessary to mix a large amount of methyl radicals. This causes a problem of a reliability-related failure called “poisoned via.”
FIG. 9
illustrates a mechanism of occurrence of a poisoned via failure. In
FIG. 9
, reference numeral
1
denotes a substrate on which a device and a first plasma oxide film
3
are formed;
2
, a lower-layer aluminum conducting line;
3
, a first plasma oxide film;
4
a
, an organic SOG film;
5
, a second plasma oxide film;
6
, a titanium nitride/titanium film;
7
, a tungsten film;
8
, a layer denatured by oxygen plasma;
9
, water migrated from the via side wall; and
10
, an interstice (poisoned via).
The poisoned via is a failure that occurs in the connection hole (via)
10
for connecting the upper and lower conducting layers. The poisoned via is generated when a portion of the organic SOG film
4
a
exposed at the via side wall is bombarded with oxygen plasma, during resist removal after opening of the via, and is, thereby denatured. That is, Si—CH
3
radicals are changed to Si—OH radicals by the oxygen plasma, leading to easy entrance of water from the external air. The water introduced from the external air is emitted through the side wall when the via is charged with the tungsten film
7
, for instance by CVD, and thereby prevents growth of the tungsten film
7
in the via
10
. As a result, the resistivity increases or a disconnection occurs in the via
10
, and the reliability of the conducting line is reduced remarkably.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the above problems of the conventional method. More specifically, an object of the invention is to reduce the relative dielectric constant of a silicon oxide film formed by a CVD method using organic silane, such as methylsilane and hydrogen peroxide (H
2
O
2
), and realize superior embeddability, while preventing a poisoned via from being formed in a resulting insulating film.
According to one aspect of the present invention, a semiconductor device comprises an interlayer insulating film that is made of a material having silicon atoms as main elements, and substantially each of said silicon atoms having at least an oxygen bond and a carbon bond, and further at least some of the silicon atoms have a hydrogen bond.
In another aspect of the present invention, the carbon bond is a bond with either a methyl radical, an ethyl radical, or a vinyl radical.
According to another aspect of the present invention, in a manufacturing method of a semiconductor device, an interlayer insulating film is formed by chemical vapor deposition by using a mixed gas of hydrogen peroxide and a reactive gas having a gas molecular structure in which each silicon atom has at least a hydrogen bond and a carbon bond, and thereby the resultant interlayer insulating film has silicon atoms as main elements, and substantially each of the silicon atoms has at least an oxygen bond and a carbon bond, and further at least some of the silicon atoms has a hydrogen bond.
In another aspect of the present invention, in the manufacturing method of a semiconductor device, an organic silane is used as the reactive gas.
In another aspect of the present invention, in the manufacturing method of a semiconductor device, the organic silane is selected from a group of methyl silane, ethylsilane, and vinylsilane or a mixture of either methyl silane, ethylsilane, or vinylsilane.
Other and further objects, features and advantages of the invention will appear more fully from the

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