Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-11-08
2001-12-25
Robertson, David L. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
06334165
ABSTRACT:
BACKGROUND
1. Field of the Present Invention
The present invention is generally related to the field of semiconductor memories and more particularly to a method of determining the address type of a serial EEPROM.
2. History of the Related Art
Electrically erasable programmable read only memories (EEPROMs) provide an economical device in which to store product specific information. This product specific information can be used in numerous ways, including, as examples, product part number information, date of manufacture information, customization data, product serial number, etc. In one implementation, EEPROMs are incorporated into a system that utilizes an Inter IC bus (I
2
C bus). The I
2
C bus is a simple two line bus for interconnecting a variety of integrated circuits. For detailed information regarding the I
2
C bus, the reader is referred to the I
2
C
Bus Specification, Version
2.0, Dec. 1998 from Phillips Semiconductors B.V. (www.semiconductors.phillips.com) P.O. Box 218, 5600 MD Eindhoven, The Netherlands, and to Paret et al,
The I
2
C Bus From Theory To Practice
(John Wiley & Son Ltd. 1997), ISBN No. 0471962686, both incorporated by reference herein. Various I
2
C compatible EEPROMs have identical pin-outs and differ only in their storage capacity and their storage address format. For example, I
2
C compatible EEPROMs are available in 1K and 65K capacities. The industry standard part designation number for the I
2
C compatible 1K EEPROM is 24C01 and the part number for the 65K I
2
C compatible EEPROM is 24C65. The pin-outs of the 24C01 and the 24C65 are identical and their function is the same except for one important difference. The 24C65 requires a 2-byte storage address while the 24C01 requires only a single address byte. When a product matures and outgrows a 1K part, a larger part such as the 65K part can be substituted with no hardware changes. The larger part, however, will require a second address byte. Consider the case where older products keep the small part and newer products employ the larger part. Software that will be installed on both the newer products and the older products must distinguish between the two types of devices because sending a 2-byte address to a small part will result an unintentional write cycle. This unintentional write cycle occurs because the small part expects only a single address byte and treats the next byte (the second address byte in the case of a 65K part) as data and writes it to the address indicated by the first address byte. It will be appreciated that unintentional writing of information to an EEPROM design to store product specific information is unacceptable. Similarly, sending a single address byte to a large part follow by a data byte does not achieve the desired function because the single address byte and the data byte are interpreted by the 2-byte part as a 2-byte address. Thus, the described sequence would result only in setting an address pointer of the large part to an address defined by the single address byte and the data byte. Therefore, it would be beneficial to implement a method and solution by which a system internally determines the type of EEPROM that it is addressing. It would be further desirable if the implemented system did not significantly increase the cost of the system, did not require extensive and complex software generation, and did not alter data stored in the EEPROM.
SUMMARY OF THE INVENTION
The identified issues are addressed in the present invention by a method, system, and computer program product for determining address type of a serial EEPROM in an electronic system. The method includes reading data from at least one location of the EEPROM for a first time and saving the data for future reference. Thereafter, a sequence of transactions is executed that alters the contents of the EEPROM in a prescribed manner if the EEPROM is of a first type. The sequence of transaction leaves the EEPROM in an unaltered state if the EEPROM is of a second type. Data is the read from at least one location of the EEPROM for a second time. The location of the data read from the EEPROM the second time is the same as the location of the data read the first time if the EEPROM is of the first type. The data read the first time and the data read the second time are then compared. If it is determined that the data read the second time does not differ in the prescribed manner from the data read the first time, the type of the EEPROM is identified as the second type. In one embodiment, the indicated steps are repeated to achieve additional assurance that the EEPROM is of the first type, if it is determined that the data read the second time differs in the prescribed manner from the data read the first time. In one embodiment, reading data from the EEPROM for the first time includes writing an initial byte to the EEPROM for a first time to set the address pointer to a known state if the EEPROM is of the first type. In one embodiment, the sequence of transactions include writing two bytes to the EEPROM, wherein the value of the first of the two bytes is the value of the initial byte written to the EEPROM. In one embodiment, the method includes, prior to reading data from the EEPROM for the first time, writing two bytes to the EEPROM if is determined that the EEPROM is configured with an address type indicator field, where the two bytes comprise the 2-byte address of the indicator field in an EEPROM of the second type. In this embodiment, the two bytes of address type indicator information are read from the EEPROM. The contents of the two bytes are indicative of the address type of the EEPROM.
REFERENCES:
Siemens AG, Standard EEPROM ICs-SLx24C01/02 1/2 Kbit Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus Data Sheet, Feb. 2, 1999, pp. 1-23.*
Siemens AG, Standard EEPROM ICs-SLx24C64 64 Kbit Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus Data Sheet, Feb. 2, 1999, pp. 1-28.
Barenys Michael Anton
Beebe William Eldred
Faust Robert Allan
Goodwin Joel G.
International Business Machines - Corporation
Lally Joseph P.
McBurney Mark E.
Robertson David L.
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