Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-12-21
2001-11-06
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S060000, C257S913000, C257S353000, C438S149000, C438S151000, C438S154000
Reexamination Certificate
active
06313507
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a silicon-on-insulator (SOI) semiconductor device, and more particularly, to an SOI semiconductor device capable of preventing floating body effect of the SOI device and method of manufacturing the same.
2. Description of the Related Art
As semiconductor devices have high performance, the SOI substrate (hereinafter “SOI device”) has been suggested remarkably instead of silicon substrate made of bulk silicon. The SOI substrate comprises a handling wafer as a supporting part, a buried insulating layer and a semiconductor layer on which a device is formed later. An SOI device formed on an SOI substrate is completely isolated by a buried oxide layer and field oxide layer, and a junction capacitance is reduced, thereby achieving low power consumption and fast operation.
FIG. 1
is a cross-sectional view showing a conventional SOI device in which a transistor is formed. As shown in the drawing, an SOI substrate
10
comprising a handling wafer
11
, a buried insulating layer
12
and a semiconductor layer
13
, is provided. A field oxide layer
14
is formed on a selected portion of the semiconductor layer
13
of the SOI substrate
10
thereby defining an active region. A bottom of the field oxide layer
14
is in contact with the buried insulating layer
12
. A gate electrode
16
having a gate insulating layer
15
is formed at a selected portion of the semiconductor layer
13
, and a sidewall spacer
17
is formed of an insulating layer at both sidewalls of the gate electrode
16
. Junction regions
18
a
,
18
b
are formed at the semiconductor layer
13
of both sidewalls of the gate electrode
16
. Bottoms of the junction regions
18
a
,
18
b
are in contact with the buried insulating layer
12
.
In a transistor formed on such SOI substrate, the junction regions
18
a
,
18
b
are in contact with the buried insulating layer
12
and the junction capacitance is lower than the bulk silicon device, thereby performing fast operation. Further, if thickness of the semiconductor layer
13
is below 100 nm, on-current of transistor can be increased.
However, if the semiconductor layer
13
on which a transistor is formed later is separated by the field oxide layer
14
and the buried insulating layer
12
, and the semiconductor layer
13
is formed of thin film, then potential within a channel region is higher than that within a conventional MOS transistor when the channel layer is completely depleted. Moreover, a potential barrier between source region and the channel region is lowered. Holes generated by the impact ions of the depletion layer at the drain side, are temporarily stored in the channel region. By doing so, potential in the channel region is raised and electrons are rapidly injected from the source region to the channel region. Thus, the floating body effect, i.e. a decrease of voltage between the source and the drain regions, occurs. The floating body effect causes malfunction of semiconductor device.
SUMMARY OF THE INVENTION
The object of the present invention is to provide an SOI device capable of forming thin semiconductor layer and also preventing the floating body effect, and a method for manufacturing the same.
In one aspect, the present invention provides an SOI device comprising: a substrate; a buried insulating layer formed on the substrate; a conductive layer formed on the buried insulating layer; a semiconductor layer formed on the conductive layer; an isolation layer formed on a selected portion of the semiconductor layer and defining an active region; a transistor comprising a gate electrode formed on a selected portion of the active region of the semiconductor layer, and source and drain regions formed at the active regions of both sides of the gate electrode; and a body electrode formed to be contacted with the conductive layer within the isolation layer, and applying a selected degree of voltage to the conductive layer.
In another aspect, the present invention provides a method for fabricating SOI device comprising the steps of: forming an isolation layer on a first silicon substrate; forming a conductive layer on the isolation layer and the first silicon substrate; forming a buried insulating layer on the conductive layer; bonding the second silicon substrate so as to contact with the buried insulating layer; exposing the isolation layer by removing backside of the first silicon substrate by selected thickness thereby defining a semiconductor layer; forming a transistor by forming a gate electrode, a source region and a drain region at selected portions of the semiconductor layer; etching a selected portion of the isolation layer so as to expose the conductive layer; and forming a body electrode to be contacted with the conductive layer within the isolation layer.
REFERENCES:
patent: 4810664 (1989-03-01), Kamins et al.
patent: 4974051 (1990-11-01), Matloubian et al.
patent: 5128733 (1992-07-01), Tyson
patent: 5185280 (1993-02-01), Houston et al.
patent: 5674760 (1997-10-01), Hong
patent: 5770881 (1998-06-01), Pelella et al.
patent: 5889314 (1999-05-01), Hirabayashi
patent: 5894152 (1999-04-01), Jaso et al.
patent: 11017001 (1999-01-01), None
Chaudhuri Olik
Doan Theresa T.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Hyundai Electronics Industries Co,. Ltd.
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