Semiconductor device having a sense electrode

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S153000, C257S355000

Reexamination Certificate

active

06188109

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to an improvement to enhance a protecting function against abnormalities.
2. Description of the Background Art
In general, a power semiconductor device must have excellent characteristics related to normal operation, for example, a low steady loss and a low switching loss. In addition, the power semiconductor device must have a performance to withstand to some extent or more when it is placed in unexpected abnormal conditions, for example, an overcurrent or an overvoltage is applied, that is, abnormalities are caused. In other words, the power semiconductor device must have a certain tolerance to the abnormalities.
As devices to meet such requirements, for example, a device
151
shown in
FIG. 85 and a
device
152
shown in
FIG. 86
have been known. The devices
151
and
152
correspond to two typical examples of an IGBT (Insulated Gate Bipolar Transistor). While the device
151
is formed as an IGBT of a trench type, the device
152
is formed as an IGBT of a planar type. In this respect, the devices
151
and
152
are different from each other.
A semiconductor substrate
90
forming a main part of each of the devices
151
and
152
comprises a p
+
collector layer
1
, an n
+
buffer layer
2
and an n

layer
3
sequentially provided from a lower major surface to an upper major surface. A p base layer
4
is selectively formed in an exposed surface of the n

layer
3
, and an n
+
emitter layer
5
is selectively formed in an exposed surface of the p base layer
4
. An emitter electrode
11
is connected with both the p base layer
4
and the n
+
emitter layer
5
, and a collector electrode
12
is connected with the p
+
collector layer
1
.
In the device
151
, the p base layer
4
is connected to the emitter electrode
11
L through a p
+
contact layer
6
. A buried gate electrode
7
is provided on the inside of a gate trench
85
formed in the semiconductor substrate
90
with a gate oxide film
9
interposed therebetween. The buried gate electrode
7
is opposed to a portion of the p base layer
4
(a channel region) interposed between the n
+
emitter layer
5
and the n

layer
3
. A gate electrode
13
is connected with the buried gate electrode
7
. In the device
152
, a p layer
42
is formed continuously to a lower portion of the p base layer
4
. A gate electrode
13
is opposed to a portion of the exposed surface (the channel region) of the p base layer
4
provided between the n
+
emitter layer
5
and the n

layer
3
with the gate oxide film
9
interposed therebetween.
In both the devices
151
and
152
, if a voltage which is equal to or higher than a threshold voltage is applied to the gate electrode
13
in a state in which a voltage is applied to the emitter electrode
11
and the collector electrode
12
, a MOSFET including the n
+
emitter layer
5
, the p base layer
4
and the n

layer
3
is turned ON. As a result, electrons and holes are injected into the n

layer
3
from the n
+
emitter layer
5
and the p
+
collector layer
1
, respectively. Consequently, conductivity modulation is caused so that the IGBT is turned ON. If the voltage of the gate electrode
13
is changed lower than the threshold voltage, the MOSFET is turned OFF so that the injection of the electrons from the n
+
emitter layer
5
is stopped. As a result, the IGBT is turned OFF.
Since the device
151
has the trench type, a gate is formed along the gate trench
85
to set a high density of the channel region, that is, a high channel density. As a result, a steady loss and a switching loss can be reduced more than in the device
152
of the planar type. In the device
151
, however, the channel density is set high so that a saturation current is increased in a MOSFET portion.
Consequently, when short-circuit abnormalities are caused (a load is short-circuited due to unexpected cause, or a supply voltage is applied to the device by a gate control circuit or the like in a state in which the channel is conducting), for example, a short-circuit current having an excessive magnitude flows into the device. In some cases, accordingly, a thermal runaway is caused by the short-circuit current so that the device
152
is broken, that is, a tolerance to short-circuit abnormalities (a short-circuit tolerance) is reduced.
In the device
152
, the channel density is low so that the saturation current of the MOSFET has a small magnitude. Therefore, the short-circuit tolerance is higher than in the device
151
. However, the steady loss and the switching loss are large and excellent characteristics cannot be obtained during normal operation.
As a technique to solve the problem of trade-off, devices shown in
FIGS. 87 and 88
, that is, devices having a protecting function against short-circuit abnormalities have been reported. These devices have been disclosed by Y. SEKI (p. 31-35) and Y. SHIMIZU (p. 37-39) in “Proceedings of The 6th International Symposium on Power Semiconductor Devices & IC's, (1994)”.
The device indicated by a circuit symbol in
FIG. 87
is formed in such a manner that a part of a main current (a collector current) flowing from a collector electrode C is split so that a small current which is proportional to the main current flowing out of an emitter electrode E, that is, a sense current can be taken out from a sense electrode SE in the devices
151
and
152
formed as the IGBTs. The emitter electrode E formed on a major surface of a semiconductor substrate is divided to form the so-called multiemitter form. A new emitter electrode E and a sense electrode SE having a parallel relationship with the emitter electrode E are formed so that the sense current can be taken out.
A device
153
shown in a circuit diagram of
FIG. 88
comprises the IGBT shown in
FIG. 87
as a main element, and further comprises a short-circuit protecting circuit connected with the IGBT. More specifically, a resistive element R
4
is connected with the sense electrode SE of the IGBT, and a series circuit formed by a diode D
12
and. a idtransistor M
4
is connected with a gate electrode G and the emitter electrode E of the IGBT. The transistor M
4
is formed as a MOSFET, and the sense electrode SE of the IGBT is connected with a gate electrode G of the transistor M
4
. The diode D
12
is provided between the gate electrode G of the IGBT and a drain electrode D of the transistor M
4
in a forward direction with respect to a current flowing from the gate electrode G toward the emitter electrode E of the IGBT.
FIG. 88
also shows the typical form of use of the device
153
, that is, a half bridge circuit. An output of a gate power supply V
G
is connected with the gate electrode G of the device
153
through a gate resistive element R
G
. A main power supply V
CC
is connected through a load L with the emitter electrode E and a collector electrode C of the device
153
. A free wheel diode FWD is connected in parallel with the load L.
In the half bridge circuit, if the main current flowing in the device
153
is increased due to short-circuit of the load L, that is, short-circuit abnormalities, the sense current flowing through the sense electrode SE is also increased. Since the sense current flows into the resistive element R
4
, a large voltage drop is generated across the resistive element R
4
with the increase in the sense current.
The voltage drop across the resistive element R
4
is input as a gate voltage to the gate electrode G of the transistor M
4
. Therefore, when the main current of the IGBT exceeds a certain level, the transistor M
4
is short-circuited. As a result, an electric potential of the gate electrode G of the IGBT is lowered through the diode D
12
so that a rise in the main current of the IGBT is suppressed. Thereafter, a gate voltage for cutting off the IGBT is supplied from the gate p

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