Asynchronous delay circuit

Details Asynchronous delay circuit Asynchronous delay circuit

1976-01-08

1977-01-04

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307208, 307238, 307215, 307218, 307247R, 307289, 307291, 328195, 328206, H03K 513, H03K 1934, H03K 329

Patent

active

040016110

ABSTRACT:
An asynchronous delay circuit, in which a flip-flop circuit of the latch type is employed to store logical values of two transmission lines. The logical values of the two transmission lines are applied through two gates to the flip-flop circuit only when the flip-flop circuit is previously established to an empty state where logical values of the two outputs of the flip-flop circuit are coincident with each other. The flip-flop circuit may be formed by two NOR circuits or two NAND circuits. A plurality of the above mentioned asynchronous delay circuits may be successively connected in a cascade arrangement by further including differentiators, first connection lines, second connection lines, third connection lines and an input circuit to form an elastic store.

REFERENCES:
patent: 3444470 (1969-05-01), Bolt et al.
patent: 3510787 (1970-05-01), Pound et al.
patent: 3786276 (1974-01-01), Rosch

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