System and method for cell switching with a peripheral...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process

Reexamination Certificate

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C710S119000, C710S242000, C370S396000

Reexamination Certificate

active

06311230

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to telephone switches and, more specifically, to a system and method for cell switching that employs a peripheral component interconnect (“PCI”) bus and a decentralized, computer-controlled cell switching architecture.
BACKGROUND OF THE INVENTION
Modern communications networks comprise a plurality of endpoints (such as telephones and computers) linked together via a corresponding plurality of lines, allowing the endpoints to be interconnected to route voice, video and data traffic (hereinafter collectively referred to as “data” or “payload”) from any one endpoint through the network to any other endpoint. Interconnection of the lines is conventionally performed at central locations (or “offices”) that contain one or more switches.
Conventional analog switches comprise a matrix of interconnects that allow the switch to couple any two of the lines together, thereby creating a connection and allowing data to cross from one line to the other. Although most lines in an analog network carry only a single stream of analog data, time division multiplexing (“TDM”) has traditionally been employed to divide a single physical line into fixed-length time slices, allowing multiple analog data streams to be carried in the single physical line. While TDM increases the overall utilization of a given line, the length of each time-slice is immutable. Thus, a given data stream is allocated neither more nor less than its fixed time-slice.
More modern telecommunications networks operate on digital (including digitized analog) data. Persons using the network can readily perceive the resulting increases in data fidelity and transmission rate. However, digital data have other advantages that are not so apparent to the user.
One significant such advantage is that a stream of digital data can readily be divided into segments. The segments can be of varying length or fixed length and may be alternatively called “blocks,” “packets,” “frames” or “cells.” Header information, including the path through the network that the segment is to take or the destination to which the segment is heading, is typically provided with the segments. Depending upon the specific protocol, each segment may also be provided with error checking information. Therefore, each segment can be switched individually through the network. In fact, segments corresponding to multiple data streams can be carried on a single line, but the overall bandwidth of the line can be allocated flexibly, such that each stream is allocated bandwidth as needed (enabling so-called “Bandwidth-ON-Demand”). Thus, switching of digital data is not required to suffer the fixed time-slice disadvantages of TDM.
Asynchronous Transfer Mode (“ATM”) is becoming an important standard for communication of digital data. In ATM parlance, the segments are contained in “cells.” Cells are fixed at 53 octets in length. The leading 5 octets contain header information, while the remaining 48 octets contain the segment itself. The fixed length of the cells allow them to be transported quickly through a network.
It has been found that general purpose computers can be made to control switches. In such computer-controlled switches, a processor provides central control for the communication of data among ports (coupled to inbound and outbound lines) coupled to the processor by a bus. Segments of data are communicated from one port to the processor and back out to another port, the processor acting as bus master at all times. Some computer-controlled switches employ TDM to divide the processor/bus bandwidth evenly among the various ports. Whether or not TDM is employed, the centralized nature of this communication places heavy burdens on the processor and the bus, limiting the effective bandwidth of the computer-controlled switch.
Often, such computer-controlled switches have an open, modular architecture, allowing the switches to be easily expanded. Accordingly, the ports are provided on port cards. However, the port cards have always been under direct control of (“slaved to”) the processor.
Accordingly, what is needed in the art is a computer-controlled cell switch that can switch cells reliably and quickly by having decentralized control of cell communication. Preferably, the cell switch should be modular and amenable to an accepted bus standard. More preferably, the cell switch should be amenable to ATM cells.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a port card employable in a cell switch including a host computer having a processor and a bus for interconnecting a plurality of port cards and a method of switching cells in the cell switch. The port card includes: (1) bus master circuitry for gaining control of the bus to allow the port card to place cells to be switched in the cell switch and (2) interface circuitry, coupled to the local memory and the bus master circuitry, that places the cells on the bus when the bus master circuitry has gained control of the bus, the cells communicated directly from the interface circuitry to another port card in the cell switch via the bus. The processor (or, more generally, the host computer) is thereby relieved of having to switch the cells.
The present invention therefore introduces a cell switch having modular port cards that have the ability to communicate cells directly among one another. The port cards may be proprietary or non-proprietary telephone interface cards, digital signal processing (“DSP”) cards, T1 cards or any other conventional or later-developed cards that can be used to provide an interface between the cell switch and the remainder of a telephone or data network. A local, perhaps shared, memory preferably receives and stores cells to be communicated between the cell switch and the remainder of the network. The present invention is preferably not restricted to TDM, although the cell switch can inter-operate with conventional slave, TDM-based port cards.
When a port card needs to place cells on the bus, the bus master circuitry has the ability to request the bus and act as bus master. The bus interface circuitry then places the cells on the bus. The host computer, while involved in the process of initializing port cards and defining virtual circuits within the cell switch, is not burdened with controlling the actual communication of cells from one port card to another via the bus. It should be understood, however, that the cell switch can operate with conventional port cards that do not have bus master circuitry. In such cases, the host computer receives the cells from the conventional port card and directly controls the routing of cells among conventional port cards.
In one embodiment of the present invention, the interface circuitry is peripheral component interconnect (“PCI”) bus interface circuitry having a data bus width of 32 bits. Those skilled in the art are familiar with PCI data buses and their flexibility. Of course, the present invention can operate on other buses that can accommodate a change in bus master.
In one embodiment of the present invention, the cells are 53 octets long, the interface circuitry appending a 3 octet trailer including an index octet (a “PCI index”) to each of the cells, the index octet indicating an order of the cells with respect to one another. Thus, the cell with its trailer is 56 octets long. This length is preferably an even multiple of the data width of the bus. If the data width of the bus is 32 bits (4 octets), the 56 octet cell and trailer can be communicated in 14 pieces.
In one embodiment of the present invention, the cells are ATM cells. Those skilled in the art are familiar with ATM cells and their advantages in high-speed switching. The present invention is employable with ATM cells or any other block, packet, frame or cell type.
In one embodiment of the present invention, the port card further includes an inbound cell queue for receiving inbound cells from the other port card, an index octet associated with each of t

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