Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
1998-10-09
2001-12-25
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S004000, C703S020000, C714S741000, C702S057000, C702S058000
Reexamination Certificate
active
06334100
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
A number of related co-pending United States patent applications commonly owned by the assignee of the present document and incorporated by reference in their entirety into this document are being filed in the United States Patent and Trademark Office on or about Oct. 9, 1998. The list of these applications is as follows: Hewlett Packard Company Ser. No. 09/169,320, entitled “METHOD AND APPARATUS FOR LIMITED ACCESS CIRCUIT TEST”; Hewlett Packard Company Ser. No. 09/169,597, entitled “METHOD AND APPARATUS FOR SELECTING STIMULUS LOCATIONS DURING LIMITED ACCESS CIRCUIT TEST”; Hewlett Packard Company Ser. No. 09/169,777, entitled “METHOD AND APPARATUS FOR SELECTING TARGETED COMPONENTS IN LIMITED ACCESS TEST”; Hewlett Packard Company Ser. No. 09/169,710, entitled Hewlett Packard Company Ser. No. 09/169,421, entitled “METHOD AND APPARATUS FOR SELECTING TEST POINT NODES FOR LIMITED ACCESS CIRCUIT TEST”; and Hewlett Packard Company Ser. No. 09/169,709, entitled “METHOD AND APPARATUS FOR CORRECTING FOR DETECTOR INACCURACIES IN LIMITED ACCESS TESTING”.
FIELD OF THE INVENTION
The present invention relates generally to electronic test machines and methods, more particularly to electronic test machines that test printed circuit boards on which electronic components have been mounted or loaded, and even more particularly to printed circuit board electronic models.
BACKGROUND OF THE INVENTION
Printed circuit board modeling includes creating a faithful numerical description of all devices on a board and their interconnections. This description includes the designators of the devices, their type (resistor, capacitor, inductor, diode, transistor, etc.), their nominal values, the acceptable ranges of tolerance for these values, and the accessibility of interconnections for test probe locations. When such a model is obtained for a board that is known to be good, it can be used on the production line to automatically verify the correctness of newly manufactured boards of the same type. Board models, therefore, play an important role in board manufacturing. If the model used is not correct, good boards may be classified as bad resulting in the wasting of valuable resources, or bad boards may be classified as good resulting in bad boards that are not detected until late in the manufacturing process by functional test. It is essential, therefore, to devise a means to verify board models and correct errors in them before they are used to verify other boards.
Board models are usually created from computer aided design (CAD) data. Errors that occur during data entry or part specification result in erroneous models that need to be corrected. A brute-force method for model correction would be to visually inspect every device on the board, verifying its description in the model. Clearly, with the ever-increasing complexity of today's circuit boards, this method is not practical. Another method is to use the model to simulate the board functions then verify if the results satisfy the mission for which the board was designed. This method, however, may only conclude that a model is correct or incorrect, without indication as to which devices were modeled incorrectly. In addition, the stimuli and frequencies used in the testing environment are usually different from those used in the operating environment for which the board was designed. As a result, a board can behave in an unexpected manner in the test environment. Thus, differences between the model's behavior and that of the tested board do not necessarily indicate that the model is erroneous.
Including the two methods mentioned above, the existing methodologies for correcting board models fall into the following categories:
(1) Visual inspection of every device on the board. As stated above, with the ever-increasing complexity of today's circuit boards, this method is not practical.
(2) Simulate board function using the model and verify whether or not simulation results satisfy the purpose or mission for which the board was designed. Simulation would most likely be performed via a computer program designed for this purpose. A set of parameters, referred to as mission parameters, whose values are crucial to the circuit correctly performing its designed purpose or mission are simulated for the model and compared against those of the real board. If these are essentially similar, the model can be considered correct. Otherwise, the model is identified as being incorrect without necessarily indicating which device or devices were incorrectly modeled. Attempts have been made to build so-called fault dictionaries that match mission parameters to component values by using various heuristics. Such dictionaries would indicate which component of the model is incorrect. However, fault dictionaries are not found to be very successful in practice.
(3) When all nodes of a circuit are accessible, in circuit testers, such as those manufactured by Hewlett Packard (HP3060, HP3065, and HP3070), GenRad, Teradyne, and others, can be used to make electrical measurements at each of the nodes. These measurements can be used to calculate the parameters for each device, and the resulting calculated values can be compared to those specified for the device in the model. If a match is found for all devices, the model is correct. Otherwise, the model can be corrected one device at a time. This method, however, assumes access to all nodes of the circuit, and therefore is not applicable in limited access situations. Techniques exist that allow finding faulty components in limited access situations, but the number of simultaneous faults must be small enough for the computation time to be reasonable.
(4) Manufacturing Defect Analyzers (MDA's) can measure voltages on accessible nodes to learn nodal impedances and report a pass/fail result for the circuit based on these results. In this case, however, there is no indication as to which devices are incorrectly modeled.
To be able to correctly identify components in an electronic circuit which fail to meet desired specification, it is first necessary to have an accurate description or model of the circuit. Methods previously used to confirm the accuracy of complex circuits are time consuming and wasteful of resources, have questionable accuracy, and/or do not provide sufficient resolution to be able to identify components that have been modeled incorrectly. Thus, with the increasing complexity and cost of modem electronic printed circuit boards, there is a pressing need for techniques that can easily and accurately identify those components that have been incorrectly modeled.
SUMMARY OF THE INVENTION
In a representative embodiment, methods are provided for efficiently comparing the model of an electronic circuit, which consists of a numerical description of all its components and their interconnections, to that of an actual circuit. Accurate modeling of an electronic circuit is one of the important steps necessary in an effective board test strategy. Without a complete, accurate board model, it is difficult to accurately test complex, modern electronic printed circuit boards. The representative embodiment provides methods for identifying which components are most likely to have been modeled incorrectly. Individual components, on increasingly complex boards, do not have to be individually tested and complete information is provided which describes incorrectly modeled components.
In a representative embodiment, a numerical model of an electronic circuit is obtained from Computer Aided Design (CAD) data or by other means. This data is compared with electrical measurements made on a physical circuit such as would be fabricated on a printed circuit board. A model correction computer program compares the electronic test data against predictions of the model and a minimum list of components which must be specified in order for the program to fully compare the model to the real circuit is created. The operator then inputs values for those components which he knows to be valid based, for exam
Ahrikencheikh Cherif
Browen Rodney A.
Darbie William P.
Lannen Kay C.
McDermid John E.
Agilent Technologie,s Inc.
Teska Kevin J.
Thomson William
LandOfFree
Method and apparatus for electronic circuit model correction does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for electronic circuit model correction, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for electronic circuit model correction will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2565897