SOI small signal terminated receiver

Details SOI small signal terminated receiver SOI small signal terminated receiver

2000-05-30

2001-07-17

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S086000, C326S021000

Reexamination Certificate

active

06262591

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to terminators which are applicable to metal oxide semiconductor on insulator (MOS-soi) with triple wells integrated circuit technology and which are particularly useful for terminator networks.
This related application(s) and the present application are owned by one and the same assignee, International Business Machines Corporation of Armonk, N.Y.
The descriptions set forth in these co-pending applications are hereby incorporated into the present application by this reference.
Trademarks: S/390 and IBM are registered trademarks of International Business Machines Corporation, Armonk, N.Y., U.S.A. Other names may be registered trademarks or product names of International Business Machines Corporation or other companies.
BACKGROUND
For signal interfaces between devices terminators have been used, as described for instance in U.S. Pat. No. 4,748,426: entitled “Active termination circuit for computer interface use”, granted May 31, 1988 to Alexander Stewart for Rodime PLC, in an active termination circuit for a computer interface for reducing line reflection of logic signals. Such terminators have used a first and second resistor combination to permanently connect to a signal line that couples a plurality of peripheral devices to one another. The other ends of the first and second resistors are connected through a switching device to a positive voltage supply line and to logic ground, respectively. When termination of multiple devices was required, a plurality of resistor combinations were provided but on/off control of the switch in this example was achieved by one control that is located remote from the termination circuit systems. Integrated circuit interconnection structures have also used precision terminating resistors, as illustrated by U.S. Pat. No. 4,228,369, granted in October, 1980 to Anantha et al. for IBM.
As will be illustrated for chip interconnection, when resistor terminators are used in thin film semiconductor integrated circuits such as those used in metal oxide semiconductors (e.g. CMOS) today, they create hot spots which cannot be adequately cooled, so such resistor terminator circuits which create hot spots cannot be used in metal oxide semiconductor applications to provide terminators for chip to chip connections on chips using IBM's new sub-micron MOS (CMOS) technologies where because of the high currents used in these networks it is difficult or impossible to meet all the cooling and reliability requirements required for commercial performance. It has become necessary to invent a solution to interfacing devices which can be used in such environments on chips, and used for terminators in networks of chips and devices where there is a need to transmit digital data therebetween without overshoot and undershoot in signal transmission between the chips and devices or systems. These connections need to operate at a faster speed, accommodating data rate speeds ranging into hundreds of Mhz and Ghz. Such speeds create problems when used with advanced fabrication technology. The SOI insulator is a very poor heat conductor and very often local hot spots can be created and that can lead to problems.
The creation of a terminator which particularly may be fabricated for high speed metal oxide semiconductor on insulator (MOS-soi) applications with triple wells in integrated circuits is needed.
SUMMARY OF THE INVENTION
An integrated terminator and receiver network is provided by the preferred embodiment which can be manufactured with high speed metal oxide semiconductor on insulator (MOS-soi) with triple wells technology for integrated circuit applications which is useful for fast transmission of digital data, eliminating or reducing overshoot and undershoot in signal transmission between chips and between systems, in serial links and data buses, for minimizing ringing and similar noise problems, for providing electrostatic discharge (ESD) protection, particularly, and mixed vender technology interface communications, and for providing a receiver with a balanced threshold voltage between the logic levels to obtain maximum noise tolerance.
These and other improvements are set forth in the following detailed description. For a better understanding of the invention with advantages and features, refer to the description and to the drawings.


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