Shallow trench isolation on a silicon substrate using...

Details Shallow trench isolation on a silicon substrate using... Shallow trench isolation on a silicon substrate using...

1998-11-20

2001-05-29

Booth, Richard (Department: 1775)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

C438S296000, C438S424000

Reexamination Certificate

active

06238998

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a process of fabricating a trench on a silicon substrate and, more particularly, to a process of forming a trench having tapered side walls on a silicon-on-insulator (SOI) substrate.
BACKGROUND OF THE INVENTION
An integrated circuit or an array of discrete integrated circuit devices includes numerous semiconductor devices. Current leakages and parasitic capacitances between devices can interfere with the intended operation of the circuit. Therefore, in many circuits, it is necessary to electrically isolate devices from one another. Several isolation techniques have been developed to meet that requirement.
A silicon-on-insulator (SOI) structure is a structure in which a buried insulating layer electrically isolates a silicon layer from a silicon substrate. The SOI structure does not always occupy the entire silicon substrate. Often, the SOI structure occupies only a portion of the silicon substrate.
Shallow Trench Isolation (STI) is a process used in isolating devices formed on SOI substrates. STI involves etching trenches, having side walls and bottoms, in the SOI substrate. Following etching, the trenches are filled with an oxide.
Unfortunately, there is a problem in implementing shallow trench isolation processing (STI) in SOI substrates. Following etching, and before filling the trenches with an oxide, the silicon layer portions of the trench side walls are oxidized. This step produces a bottleneck-shaped trench in which the trench side walls are wider adjacent the trench bottom than adjacent the top of the silicon layer portion of the trench side wall. After the step of oxidizing the silicon layer portion of the trench side walls, the next step in STI processing comprises filling the trenches with an oxide. The bottleneck shape of the trench makes filling the trench with an oxide difficult. This difficulty results in the formation of a seam in the center of the trench. This seam may open up during subsequent processing steps, leading to several problems. For instance, the seam might cause shorts between subsequently deposited poly gates if filled with polysilicon during the poly gate deposition step.
The deficiencies of the conventional processes of fabricating a trench on a silicon substrate using shallow trench isolation (STI) show that a need still exists for a process to eliminate the bottleneck-shaped trench produced after oxidizing the trench side walls. To overcome the shortcomings of the conventional processes, a new process is provided. An object of the present invention is to provide a process for fabricating a trench using STI in which the trench side walls are spaced further apart adjacent the exposed surface than adjacent the trench bottom.
SUMMARY OF THE INVENTION
To achieve these and other objects, and in view of its purposes, the present invention provides a process for fabricating a trench having a tapered shape, side walls, and a bottom on a silicon substrate. The substrate has an exposed surface. The trench side walls are spaced further apart adjacent the exposed surface than adjacent the trench bottom. The process comprises the following steps:
forming an initial trench having initial trench side walls and a trench bottom extending from the exposed surface into an interior of the substrate;
implanting nitrogen ions on the initial trench side walls so that more nitrogen ions are implanted adjacent the exposed surface than adjacent the trench bottom; and
oxidizing the trench side walls, thereby creating a trench having the tapered shape.
In a preferred embodiment, the nitrogen ions are implanted on the initial trench side walls at an angle of from about 10 degrees to about 60 degrees relative to the exposed surface.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.


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“Self-Aligned Ion Implanted Oxidation Barrier for Semiconductor Devices” by H.H. Hansen & D.R. Thomas, IBM Technical Disclosure Bulletin, vol. 24, No. 9, Feb. 1982, pp. 4641-4642.
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