Surface mount semiconductor package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S712000, C257S678000, C257S796000, C257S675000, C257S708000, C257S709000

Reexamination Certificate

active

06204554

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor device packages and lead frames therefor, and more specifically relates to a high power semiconductor device adapted for surface mounting.
BACKGROUND OF THE INVENTION
Packages for high power semiconductor devices which can be surface mounted on an insulated metal substrate (IMS) or other flat support board surface are well known. One such package is shown in U.S. patent application Ser. No. 08/583,219, filed on Jan. 4, 1996, entitled SURFACE-MOUNT SEMICONDUCTOR PACKAGE which is incorporated herein by reference. Such packages are very well adapted for surface mounting to the conductive patterns of flat support boards such as an IMS structure (a thick copper or aluminum substrate covered by a thin insulation film which has a thin patternable copper or other conductive solderable upper surface).
The present invention is an improvement of the device of U.S. patent application Ser. No. 08/583,219, making it more efficient and more easily manufacturable.
SUMMARY OF THE INVENTION
In accordance with the invention, there is provided a novel lead frame which can receive one or more semiconductor die, such as power MOSFET die, IGBT die, fast recovery diode die, Schottky diode die, and mixtures thereof, on a central, flat pad section. The die are interconnected by the pad at their bottom surfaces, and at their tops by appropriate wire bonds. The lead frame has two power terminals, which may be interconnected at two adjacent corners of a rectangular package. The power terminals are accessible for connection externally of a flat plastic molded housing which encloses the top and sides of the central lead frame pad. A plurality of control pins or terminals, which initially are a part of the lead frame but are isolated from the heat sink pad after molding of the housing, extend from the side of the housing which is opposite the side containing the power terminal.
There are at least two closely spaced control terminals or pins which can be wire bonded to the gate and cathode or current sense terminals of the die within the housing. A remote third terminal (from the closely spaced first and second control terminals) is also available for connection to some other terminal, for example, the gate terminal of a thyristor die if such a die is contained within the housing.
The lead frame is preferably a single gauge conductive sheet. The terminals extending through the borders of the molded housing can be partially vertically offset to provide an improved plastic lock to the lead frame. The bottom surfaces of the terminals and the lead frame pad lie on a common plane. The main heat sink pad can have parallel slots therethrough on opposite sides of the die on the pad to provide a further plastic lock to the molded housing. Shallow dovetail grooves can extend from an interior edge of these slots toward one or both ends of the pad to also provide improved plastic locking.
The surface of the pad may have a waffled or dimpled surface to improve soldering of the bottom die surface electrodes to the pad. In accordance with a feature of the invention, the bottom surface of the pad which is to be surface mounted to a heat sink or conductive pattern of an IMS board can also be waffled to improve the ability to solder the pad to the heat sink and to avoid the formation of solder voids.
The bottom of the insulation housing is also provided with washing grooves which extend fully across the width of the package, are parallel to the sides containing input and output terminals and are located between the terminals and the pad. These grooves increase the surface tracking distance between the terminals and the pad and allow the washing out of solder flux during the solder down process.
In accordance with a further feature of the invention, short shallow shelves extend from the bottom ends of the grooves and across the width of the housing bottom to improve the flux washing function.
As previously described, the various terminal pins are partly vertically sheared or offset to improve the plastic lock. In accordance with a further feature of the invention, the partially rounded edge of the offset region is provided with a small square notch or stepped corner to give a sharp edge to prevent the bleeding of plastic over the bottom surfaces of the terminal during molding.
As a further feature of the invention, the terminals are formed with elongated crushable beads at their side surfaces adjacent the portions of the terminals just outside the plastic housing. These beads are crushed inwardly by a molding tool when it closes, to provide a seal which prevents the molding plastic to bleed out and over the sides of the terminals which extend beyond the housing and which could interfere with the solder connections to the terminals.
As a still further feature of the invention, an integral lead frame bar connects the power input terminals at the two corners of the housing and internally of the housing. Wire bonds from the die within the housing are made to this single bar which is contained within the housing. The bar improves the wire bond connection and also acts as a plastic lock to the housing.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.


REFERENCES:
patent: 3786317 (1974-01-01), Thierfelder
patent: 4493145 (1985-01-01), Honda
patent: 4585291 (1986-04-01), Noschese
patent: 4649637 (1987-03-01), Hatakeyama
patent: 5047837 (1991-09-01), Kitano et al.
patent: 5191403 (1993-03-01), Nakazawa
patent: 5317194 (1994-05-01), Sako
patent: 5408128 (1995-04-01), Furnival
patent: 5434750 (1995-07-01), Rostoker et al.
patent: 5451812 (1995-09-01), Gomi
patent: 5483098 (1996-01-01), Joiner, Jr.
patent: 5521429 (1996-05-01), Aono et al.
patent: 5557150 (1996-09-01), Variot et al.
patent: 5594234 (1997-01-01), Carter, Jr. et al.
patent: 5619065 (1997-04-01), Kim
patent: 5625226 (1997-04-01), Kinzer
patent: 5905304 (1999-05-01), Ewer et al.
patent: 5977630 (1999-11-01), Woodworth et al.
patent: WO 93/19488 (1993-09-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Surface mount semiconductor package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Surface mount semiconductor package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Surface mount semiconductor package will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2548337

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.