Method of manufacturing semiconductor device

Details Method of manufacturing semiconductor device Method of manufacturing semiconductor device

1999-06-09

2001-08-28

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S664000, C438S682000, C438S683000, C438S649000, C438S637000

Reexamination Certificate

active

06281118

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device which can reduce contact resistance.
2. Description of the Related Art
In a semiconductor memory device, a cell selection signal is applied to a word line and a data signal is applied to a bit line, so that the data signal is applied to the selected cell. The bit line is in contact with the word line in the periphery region of the memory device. The word line and the bit line are formed to materials having good conductivity, for preventing signal delay. For example, they are generally formed to a tungsten polycide structure in which a tungsten silicide layer is formed on a doped polysilicon layer.
FIG.
1
A and
FIG. 1B
are cross sectional views for describing a conventional method of forming contact between a word line and a bit line in the periphery region of a memory device.
Referring to
FIG. 1A
, a word line
12
in which a first tungsten silicide (WSix) layer
12
b
is formed on a first doped polysilicon layer
12
a
is formed on a semiconductor substrate
10
. An intermediate insulating layer
14
is then formed on the overall substrate and etched to expose the portion of the surface of the first tungsten silicide layer
12
b
of the word line
12
, thereby forming a contact hole
16
. Thereafter, a second doped polysilicon
18
a
and a second tungsten silicide layer
18
b
as materials for a bit line
18
are sequentially formed on the surface of the contact hole
16
and on the intermediate insulating layer
14
, as shown in FIG.
1
B.
When forming the contact hole
16
, plasma gas such as C
x
F
y
, CF
4
+O
2
, CH
x
Br
y
is used as an etching gas. However, owing to the ion bombardment of the plasma gas, the surface crystal structure for the exposed first tungsten silicide layer
12
b
of the word line
12
is transformed into an amorphous and/or quasi-stable state, to increase contact resistance between the word line
12
and the bit line
18
.
Furthermore, owing to the bonding force difference between W—Si and Si—Si in the first tungsten silicide layer
12
b,
sputtering yield difference increases. Therefore, as shown in
FIG. 1A
, the exposed surface of the first tungsten silicide layer
12
b
is roughed, so that contact resistance between the word line
12
and the bit line
18
further increases and contact interface therebetween is unstablized.
Moreover, the plasma gas reacts with W and/or Si of the first tungsten silicide layer
12
b,
so that processing productions
100
having negative &Dgr;H as shown in TABLE 1 are created on the exposed surface of the first tungsten silicide layer
12
b,
and acts as factor increasing the contact resistance.
TABLE 1
processing productions
&Dgr; H(KJ/mole)
WC, SiC
−20.5
SiO
2
−17
WNx
−12.6
W
2
N
−72
WO
2
−533
WO
3
−843
SUMMARY OF THE INVENTION
It is therefore one object of the present invention to provide a method of manufacturing a semiconductor device which can reduce contact resistance, for solving the problems in the conventional art.
Furthermore, it is another object of the present invention to provide a method of manufacturing a semiconductor device which can stabilize contact interface.
To accomplish these above objects, according to the present invention, firstly, a semiconductor substrate on which a lower conductor pattern is formed is provided. The lower conductor pattern has a first doped polysilicon layer and a first tungsten silicide layer formed thereon. Next, an intermediate insulating layer is formed on the substrate and etched to expose a portion of the surface of the first tungsten silicide layer of the lower conductor pattern, thereby forming a contact hole. Thereafter the substrate in which the contact hole is formed, is thermally treated by rapid thermal processing under H
2
atmosphere. A second doped polysilicon layer and the second tungsten silicide layer are then formed on the surface of the contact hole treated thermally and on the intermediate insulating, sequentially. Thereafter the second tungsten silicide layer and the second doped polysilicon layer are patterned to form an upper conductor pattern being in contact with the lower conductor pattern.
In this embodiment, the rapid thermal processing is performed at the temperature 900 to 1,000° C. for 20 to 50 second with keeping H
2
atmosphere to the pressure of 10
−3
to 10
−1
Torr. Preferably, the pressure of chamber is set at high vacuum state of 10
−6
to 10
−8
Torr prior to performing rapid thermal processing.
Additional object, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.


REFERENCES:
patent: 5518960 (1996-05-01), Tsuchimoto
patent: 5710078 (1998-01-01), Tseng
patent: 1125955 (1989-05-01), None
patent: 05006973 (1993-01-01), None

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