Semiconductor device and manufacturing method therefor

Details Semiconductor device and manufacturing method therefor Semiconductor device and manufacturing method therefor

1997-12-11

2001-04-10

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S585000, C438S595000, C438S684000, C438S770000

Reexamination Certificate

active

06214724

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device and the manufacturing method therefor, particularly to the semiconductor device related to gate electrode and gate wiring, and the manufacturing method therefor.
In recent years, the demand for increasing an integrated circuit in integration density and operating speed have increased more and more. To satisfy such demand, the reduction of the resistance of the inner wiring material and the like has been studied while the distance among elements and the element size are also required to be decreased. The RC delay occurs particularly in word lines, and it has been thus demanded to reduce the resistance of the word line, above all.
In order to obtain the word line having low resistance, a polycide gate constituted of a polysilicon layer and a metal silicide layer has been used in various devices, as the latest trend. The polycide film formed from refractory metal has a lower resistance than that of a polysilicon film by almost one digit, and is a suitable material for forming the low-resistance wiring. Tungsten silicide (WSi
X
) is the most popular material as the metal silicide constituting such a polycide film.
While, in order to reduce the delay time in such a fine line as thin as 0.25 &mgr;m or below, further reduction of the resistance of the wiring is required. In order to obtain the gate electrode having sheet resistance lower than 10 &OHgr;/square with use of the polycide structure, the silicide layer must be formed thick. The thick silicide layer, however, makes it difficult to process the gate electrode pattern and to form the interlayer insulating film on the gate electrode.
In order to solve the problem, it has been thus required to attain the low sheet resistance of the gate electrode without increasing the aspect ratio of the gate electrode. To attain this object, it is essential to develop a metal gate formed by depositing a metal having lower resistivity than that of the metal silicide, directly on a gate oxide film.
Such a low-resistivity metal gate electrode, however, cannot be obtained unless various problems which have not coped with are overcome: work function, reliability of the interface between the electrode and gate insulating film, and the like.
It is particularly important for attaining the low-resistance metal gate electrode that the oxide of the electrode material should not be more stable than the gate insulating film on no account. For example, alumina (Al
2
O
3
), the oxide of aluminum is more stable than a silicon oxide film. Therefore, if aluminum is brought into contact with a silicon oxide film, the silicon oxide film is reduced in the interface thereof and alumina is produced therein. Accordingly, when such metal as aluminum is used to form a gate electrode, the gate oxide film is decreased in thickness by the reduction.
As described above, it is necessary in forming a metal gate electrode to select the material the oxide of which is less stable than the gate insulating film. However, some gate insulating films reduced by the metal gate electrodes have been reported (IEEE, Trans. Electron Devices, ED-31, 1174 [1984]), even if the metal materials used for forming the gate electrode satisfies this requirement. This requirement is thus not always suitable for forming the gate electrode.
One of the reported gate insulating films reduced by the metal gate electrodes will be described below more specifically with reference to FIG.
1
.
A sample was prepared in the following manner:
A thin silicon oxide film
72
(4 nm thick) was formed on a monocrystalline silicon substrate
71
in the thermal oxidation process. On the thin silicon oxide film
72
, a molybdenum (Mo) film
73
(100 nm thick) was deposited in the sputtering process using an Mo target and Ar gas as a sputtering gas. The sample was then subjected to a heat treatment at 1000° C.
As a result of the observation of the cross sectional view of the sample with use of a transmission electron microscope, the silicon oxide film
72
was observed to be partially reduced to be decreased in thickness.
The decrease of Gibbs' free energy when the molybdenum produces the oxide thereof is larger than that of Gibbs' free energy when the silicon produces the oxide thereof. Accordingly, from the thermodynamic point of view, the silicon oxide cannot be reduced by molybdenum. In a silicon oxide film, however, a partial reduction may occur by the metal introducing into the silicon oxide film during the deposition of the metal film, with the result that the reliability of the gate oxide film will be remarkably decreased.
As described above, when the metal gate electrode is used, the interface between the metal film and the gate insulating film cannot be easily controlled unlike the case using the conventional polysilicon film to form the gate electrode.
In addition thereto, problems in the manufacturing method will also occur in the device using the metal gate electrode. In particular, the size of the gate electrode notably affects the operation characteristics of the transistor, and thus high processing technique is required to obtain a desired size. The metal film, however, cannot be easily etched with high selectivity to a gate insulating film, unlike the conventional polysilicon film. For example, the etching selectivity of a tungsten film to a silicon oxide film is as low as 2-10. With such low etching selectivity, the silicon oxide film located below a gate electrode formed of the tungsten film will be etched during the tungsten film is etched. In the worst case, the etching solution may penetrate the silicon oxide film to etch the substrate. The fine pattern applicable to the 0.15 gate-width generation devices thus cannot be formed with such low etching selectivity.
The specific example of the etching with such low etching selectivity will be described below with reference to
FIGS. 2A-2C
.
As shown in
FIG. 2A
, a thin silicon oxide film
82
(4 nm thick) is formed on a monocrystalline silicon substrate
81
in the thermal oxidation process. On the thin silicon oxide film
82
, a tungsten (W) film
83
(100 nm thick) is deposited in the sputtering process with use of a W target and Ar gas as a sputtering gas. A 200 nm thick silicon nitride film is then deposited on the tungsten film
83
in the CVD process. Subsequently, the sample is applied with photoresist with 1 &mgr;m thickness in the spin-coat process, and then exposed to light to develop a resist pattern. Consequently, a resist pattern
85
presenting 0.15 &mgr;m width gate electrodes is formed.
The silicon nitride film
84
is then etched using the resist pattern
85
as an etching mask and CHF
3
/CH
4
gas as an etching gas, as shown in FIG.
2
B. The resist pattern
85
left after the etching process is then removed in the oxide plasma ashing process to obtain a mask pattern formed of the silicon nitride film
84
.
Next, the tungsten film
83
is etched with use of the silicon nitride film
84
as an etching mask and SF
6
/Cl
2
mix gas as an etching gas, as shown in shown in FIG.
2
C. The etching process is performed under the condition where RF power is 1.0 W/cm
2
, gas pressure is 10 mTorr, the flow rates of SF
6
/Cl
2
gas are 100 and 5 SCCM, respectively, and the temperature of the lower electrode is maintained at 80° C. In this time, the tungsten film
83
is etched at an etching rate of 100 nm/min. While, the silicon oxide film
82
is etched at an etching rate below 20 nm/min. The etching selectivity in this time is as low as 5, and thus the silicon substrate
81
will be also etched.
Such low etching selectivity to the lower film will cause some problems particularly in the case where the substrate has some steps.
FIG. 3
shows such a case where the lower substrate has some steps. When a thin oxide film
92
and a tungsten film
93
are deposited on a substrate
91
having steps, the thickness of the deposited tungsten film will increase at the steps. In the anisotropic etching process, the film is etched vertically to the surface of t

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