Stack capacitor having a diffusion barrier

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S310000, C257S532000, C257S754000

Reexamination Certificate

active

06175127

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a highly integrated memory device having a stack capacitor structure in which a transistor and a capacitor included in each cell of the memory device are coupled to each other by a polysilicon contact plug in order to achieve an increase in the cell integration degree of the memory device, and more particularly to a stack capacitor in such a memory device, wherein a capacitor has a diffusion barrier capable of inhibiting an oxidation of the polysilicon contact plug while preventing an increase in contact resistance resulting from a reaction of the polysilicon of the contact plug with a lower electrode.
2. Description of the Prior Art
Referring to
FIG. 1
, there is a sectional view schematically illustrating a simple stack capacitor used in a conventional DRAM device.
As shown in
FIG. 1
, a lower insulating layer
13
, which has storage electrode contact holes
15
, is formed over a semiconductor substrate
11
. Polysilicon is buried in the contact holes
15
, thereby forming contact plugs
17
.
Thereafter, a diffusion barrier layer
19
and a lower electrode layer for forming lower electrodes
21
are sequentially formed to desired thicknesses over the entire upper surface of the resulting structure.
The lower electrode layer and diffusion barrier layer
19
are then patterned in accordance with an etch process using a storage electrode mask (not shown), thereby forming diffusion barriers
19
and lower electrodes
21
.
Over the entire upper surface of the resulting structure, a dielectric film
23
and a plate electrode layer for forming plate electrodes
25
as upper electrodes are then formed. Thus, stack capacitors are fabricated.
The stack capacitors are electrically connected to transistors formed on the semiconductor substrate
11
via the contact plugs
17
, respectively.
The dielectric film
23
is made of a paraelectric or ferroelectric substance exhibiting a very high dielectric constant. Such a paraelectric or ferroelectric substance may be SrTiO
3
(ST), (Ba
x
, Sr
1−x
)TiO
3
(BST), Pb(Zr
x
, Ti
1−x
)O
3
(PZT), or (Pb
1−y
, Lay) (Zr
x
Ti
1−x
)O
3
(PLZT)
Typically, such a high-dielectric thin film should be deposited or annealed in an oxygen atmosphere maintained at a high temperature of 500 to 800° C. so that it exhibits a desired dielectric constant and leakage current characteristics.
For the material of electrodes used in simple stack capacitors including dielectric films exhibiting a high electric constant, accordingly, a metal such as Pt, Ir or Ru or a conductive oxide such as IrO
2
or RuO
2
is typically used which exhibits a superior electrical conductivity and superior thermal resistance and anti-oxidation characteristics is typically used.
However, since the above-mentioned high-dielectric thin film made of, for example, ST, BST, PZT or PLZT is deposited in an oxygen atmosphere at a high temperature, oxygen may be easily diffused through the lower electrodes of the capacitors, so that it may react with the polysilicon of the contact plugs. As a result, an insulating layer such as a silicon oxide film may be formed at the interface of the polysilicon with the lower electrodes. That is, there is a problem in that an undesirable electrical insulation is established.
Meanwhile, Si may also be diffused into the lower electrodes. Such a diffusion of Si may result in a degradation in the physical properties of the deposited high-dielectric thin film.
Furthermore, when the material of the lower electrodes of the capacitors come into direct contact with the polysilicon, a reaction between these two materials may occur at a high temperature of 200° C. or more, thereby producing PtSi exhibiting Schottky barrier characteristics. This results in a degradation in CMOS characteristics.
In order to inhibit an oxidizing diffusion of oxygen and Si atoms while preventing Si from coming into direct contact with the lower electrodes, a diffusion barrier layer is typically disposed between the lower electrodes of the stack capacitors and the Si layer.
In a highly integrated DRAM, such a diffusion barrier layer is mainly made of TiN having a resistivity while exhibiting superior diffusion barrier characteristics at a temperature of 600° C. or less.
However, TiN loses its diffusion barrier effect to oxygen and Si in an oxygen atmosphere maintained at a high temperature of more than 600° C. For this reason, TiN serves to greatly limit processing conditions including the deposition temperature of the high-dielectric thin film and the temperature of a subsequent thermal treatment.
SUMMARY OF THE INVENTION
Therefore, an objective of the invention is to solve the above mentioned problems involved in the prior art and to provide a stack capacitor having a diffusion barrier capable of inhibiting an oxidation of a polysilicon contact plug adapted to connect the stack capacitor to a transistor and preventing the interaction between the polysilicon of the contact plug and a lower electrode included in the stack capacitor.
In accordance with the present invention, a stack capacitor comprises a lower electrode connected to a semiconductor substrate via a polysilicon contact plug; a diffusion barrier layer formed at an interface between the contact plug and the lower electrode, the diffusion barrier layer being made of a material of Ti
1−x
Cr
x
N (
0
≦x≦
1
); and a dielectric film and an upper electrode sequentially formed over a surface of the lower electrode opposite to the interface.


REFERENCES:
patent: 5856704 (1999-01-01), Schuele
patent: 5877062 (1999-03-01), Horii

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