Method of making a semiconductor with copper passivating film

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S638000

Reexamination Certificate

active

06287970

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of semiconductor manufacturing, and more particularly, to he field of passivating semiconductor interconnects.
BACKGROUND OF THE INVENTION
In the manufacture of semiconductor wafers and integrated circuits, metal films are deposited on semiconductor substrates, oxides and other dielectrics. These metal films are used for different purposes, such as forming interconnect lines, metallic contacts, conductive vias and other conductive features on and above various surfaces of the semiconductor wafers.
Typically, aluminum has been a preferred conductive metal because it avoids various problems, such as a high contact resistance with silicon, which normally accompanies the use of gold and copper. Copper also suffers drawbacks compared to aluminum because copper migrates into device areas, causing problems in device performance. Aluminum, on the other hand, has good adhesion to silicon dioxide and performs well with plasma etching, as compared to copper.
Recently, greater interest has been shown by manufacturers of semiconductor devices in the use of copper and copper alloys for metallization patterns, such as in conductive vias and interconnects. Copper, compared to aluminum, has both good electromigration resistance and a relatively low electrical resistivity of about 1.7 &mgr;ohm·cm. Unfortunately, copper is relatively quick to oxidize especially during processing or manufacturing of the integrated circuit. For example, a drawback with chemical mechanical polishing (CMP) is that copper layers and vias are prone to heavy oxidation, which can cause dishing during the chemical mechanical polishing step.
Additionally, dynamic recrystallization of electroplated copper is a potential difficulty because the microstructure continuously changes if the copper is not annealed. The changing copper microstructure can create additional problems during CMP. Conventional annealing of electroplated copper films results in the material being more ductile. Furthermore, the copper tends to lose mechanical strength and integrity during subsequent processes such as CMP, conventional passivation or inter-level dielectric (ILD) deposition. This often leads to stress-induced voiding and lack of adhesion of the copper film to underlying layers.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of making a semiconductor device including copper while avoiding difficulties of copper oxidation and recrystallization, for example.
This and other objects, features and advantages in accordance with the present invention are provided by a method of making a semiconductor device, including the steps of: forming an oxide layer adjacent a semiconductor substrate; etching trenches within the oxide layer; depositing a copper layer to at least fill the etched trenches; and forming a copper arsenate layer on the deposited copper layer. The copper arsenate layer on the surface of the deposited copper layer inhibits oxidation and corrosion. The method may further include the step of chemically mechanically polishing the copper arsenate layer and an upper surface of the deposited copper layer.
Additionally, a second copper layer may be deposited over the oxide layer and the deposited copper layer, and a second copper arsenate layer deposited on the second deposited copper layer. The second copper arsenate layer would then preferably be chemically mechanically polished. The etch stop layer may comprise a silicon nitride layer and the copper layer may be deposited by at least one of electrodeposition, electroplating and chemical vapor deposition.
The step of forming the copper arsenate layer on the deposited copper layer stabilizes the microstructure of the deposited copper layer to thereby eliminate subsequent annealing of the deposited copper layer. Also, the step of forming the copper arsenate layer on the deposited copper layer may comprise forming the copper arsenate layer by at least one of implantation, diffusion, drive-in techniques and wet chemistry.
In another embodiment, the method of making a semiconductor device includes the steps of: forming a first oxide layer adjacent a semiconductor substrate; forming an etch stop layer over the oxide layer; forming a second oxide layer adjacent the etch stop layer and opposite the first oxide layer; etching a plurality of first openings through the second oxide layer and the etch stop layer; etching a plurality of second openings in the first oxide layer within bounds defined by the first openings; depositing a copper layer to at least fill the first and second openings; and forming a copper arsenate layer on the deposited copper layer. The copper arsenate layer on the surface of the deposited copper layer inhibits oxidation and corrosion. Again, the step of forming the copper arsenate layer on the deposited copper layer stabilizes the microstructure of the deposited copper layer to thereby eliminate subsequent annealing of the deposited copper layer.


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