Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-04-20
2001-05-22
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S305000
Reexamination Certificate
active
06236077
ABSTRACT:
BACKGROUND OF THE INVENTION
In construction of microelectronic devices, it is well known that there is a constant pressure for reduction of device size and/or increase of device capability at a given scale.
In the actual construction of reduced scale devices, attention must be paid to higher precision in configuring the materials from which the device components are formed. Attention must also be paid to the interaction of the various materials used in device construction during the device manufacture process, during device testing, and during device operation. In this regard, finer sized device components are more sensitive to adverse materials interactions since the amount of material forming the component is smaller. For example, an interaction that might have only affected the border area of a large component would affect an entire component of smaller scale (e.g., where the scale of the smaller component is the same size as the border area of the larger component). Thus, reduction in component scale forces consideration of materials interaction problems which could have been viewed as non-critical for larger scale components.
In the context of devices such as deep trench capacitors in semiconductor substrates, various materials are used to form the components of the capacitor such as the capacitor plates (electrodes), the dielectric barrier between electrodes, oxide collar structures to prevent or minimize parasitic effects, surface or buried straps to provide contact between the capacitor and the other circuitry of the device, etc. For example, the electrode in the trench is typically a highly doped polycrystalline silicon (polysilicon) material, the buried or surface strap is typically an amorphous silicon, and the semiconductor substrate is a monocrystalline silicon. The successful functioning of the capacitor depends in part on the ability of these diverse materials to maintain their original or desirably modified character during manufacture/useful life of the device.
Unfortunately, the nature of these materials is such that unwanted interactions may occur unless otherwise prevented. For example, the dopant in the polysilicon electrode may diffuse out into the monocrystalline silicon to an undesirable degree leading to compromise of the device performance (e.g., a deep junction effect). This constraint limits the amount of doping that can be employed in the trench electrode which in turn may itself limit the performance of the capacitor (e.g., increased series resistance, decreased charge storage capacity, etc.).
Furthermore, as the minimum lithographically definable feature size, F, is reduced with each successive generation of DRAM product, the cross-sectional area of the storage trench capacitor rapidly decreases. Since the series resistance/per unit depth of the conductive fill of the storage trench capacitor increases as 1/F
2
, it is critical to memory cell performance that ways to reduce the resistivity of the trench capacitor fill material be sought. Such reduction in series resistance must also be compatible with the other portions of the memory cell (i.e. must be able to withstand processing conditions without deterioration or contamination to other portions).
Thus, there is a desire for improved trench electrode structures which allow better control of materials interactions to enable construction of reliable reduced scale devices. It is also desired to meet these needs in an economical manner that minimizes or avoids compromise of other device or component properties.
SUMMARY OF THE INVENTION
The invention provides technology which enables reduced scale trench capacitor structures of improved reliability and performance. More specifically, the invention enables decreased trench electrode resistivity by incorporation of a conductive barrier layer at an intermediate level of the trench electrode structure. The conductive barrier layer is preferably either an intrinsically conductive compound barrier or a quantum conductive barrier.
In one aspect, the invention encompasses a deep trench capacitor in a monocrystalline semiconductor substrate, the capacitor comprising (i) a buried plate in the substrate about an exterior portion of a trench in the substrate, (ii) a node dielectric about at least a lower interior portion of the trench, (iii) an oxide collar about an upper interior portion of the trench, (iv) an electrode in the trench, the electrode comprising a lower region extending from the lower edge of collar (or located below the collar oxide lower edge) to node dielectric about the bottom of the trench and an intermediate electrode region extending upward from the lower electrode region, and (v) a conductive strap extending away from the trench electrode intermediate region, the conductive strap being electrically connected to the trench electrode and the monocrystalline substrate, the capacitor further comprising (vi) a conductive barrier layer between the lower and intermediate regions of the trench electrode. The conductive barrier layer is preferably either an intrinsically conductive compound barrier or a quantum conductive barrier.
In another aspect, the invention encompasses a method of forming a deep trench capacitor in a monocrystalline semiconductor substrate, the method comprising:
(a) providing a monocrystalline semiconductor substrate having (i) a buried plate in an exterior portion of a trench in the substrate, (ii) a node dielectric about at least a lower interior portion of the trench, and (iii) a lower electrode region having an exposed surface and (iv) and oxide collar about an upper interior portion of the trench,
(b) reacting surface of the lower electrode region with a nitrogen compound to form a quantum conductive layer on the exposed electrode surface, and
(c) filling the trench over the quantum conductive layer with a conductive electrode material to form an intermediate electrode region, and
(d) providing a conductive strap electrically connected to and extending away from the intermediate electrode region.
Alternatively, step (b) may be replaced with other techniques for forming quantum conductive layers. Preferred quantum conductive layers are silicon nitride compounds such as silicon nitride or silicon oxynitride. The invention also encompasses methods where the collar oxide is formed after the formation of the quantum conductive layer on the surface of the lower electrode region.
In further aspect, the invention encompasses a method of forming a deep trench capacitor in a monocrystalline semiconductor substrate, the method comprising:
(a) providing a monocrystalline semiconductor substrate having (i) a buried plate in an exterior portion of a trench in the substrate, (ii) a node dielectric about at least a lower interior portion of the trench, and (iii) a lower electrode region having an exposed surface and (iv) and oxide collar about an upper interior portion of the trench,
(b) forming a layer of said intrinsically conductive barrier material on the exposed electrode surface, and
(c) filling the trench over the intrinsically conductive barrier layer with a conductive electrode material to form an intermediate electrode region, and
(d) providing a conductive strap electrically connected to and extending away from the intermediate electrode region.
The intrinsically conductive barrier material is preferably formed by chemical vapor deposition, physical vapor deposition and/or sputtering. Preferred intrinsically conductive layers are transition metal nitrides or transition metal silicon nitrides.
The invention also encompasses methods where the collar oxide is formed after the formation of the intrinsically conductive layer on the surface of the lower electrode region.
These and other aspects of the invention are described in further detail below.
REFERENCES:
patent: 5051786 (1991-09-01), Nicollian et al.
patent: 5066615 (1991-11-01), Brady et al.
patent: 5194397 (1993-03-01), Cook et al.
patent: 5283453 (1994-02-01), Rajeevakumar
patent: 5395786 (1995-03-01), Hsu et al.
patent: 5434109 (1995-07-01), Geissler et al.
patent:
Gambino Jeffrey P.
Jammy Rajarao
Mandelman Jack A.
Radens Carl J.
Capella Steve
International Business Machines - Corporation
Nguyen Cuong Q.
Thomas Tom
LandOfFree
Trench electrode with intermediate conductive barrier layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Trench electrode with intermediate conductive barrier layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Trench electrode with intermediate conductive barrier layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2513087