Field effect transistor and power amplifier including the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S401000, C330S250000, C330S253000

Reexamination Certificate

active

06268632

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a transistor such as a field effect transistor (FET) and a bipolar transistor, and a power amplifier including such a transistor.
DESCRIPTION OF THE RELATED ART
Conventionally, power amplifiers, in particular power amplifiers for amplifying high-frequency signals, often use a dual gate FET as an active device for reducing power consumption during low-power operation.
FIG. 13
is a block diagram of a conventional high-frequency power amplifier
100
. The high-frequency power amplifier
100
shown in
FIG. 13
includes a high-frequency power input terminal
1
, a high-frequency power output terminal
2
, an input impedance-matching circuit
3
, an output impedance-matching circuit
4
, a first gate voltage supply circuit
5
, a second gate voltage supply circuit
6
, a drain voltage supply circuit
7
, a dual gate FET
8
, variable negative power supplies
9
and
10
, and a positive power supply
11
. The variable negative power supply
9
supplies a bias voltage to the dual gate FET
8
via the first gate voltage supply circuit S. The positive power supply
11
supplies a voltage to a drain of the dual gate FET
8
via the drain voltage supply circuit
7
. Such drain is also coupled to the output terminal
2
via the output impedance-matching circuit
4
to be output.
An input signal is received at the high-frequency power input terminal
1
, applied to a first gate of the dual gate FET
8
via the input impedance-matching circuit
3
, and is amplified by the dual gate FET
8
. The resultant signal is output from the high-frequency output terminal
2
via the output impedance-matching circuit
4
.
The output voltage from the variable negative power supply
10
is adjusted so as to control a voltage applied to a second gate of the dual gate FET
8
by the variable negative power supply
10
via the second gate voltage supply circuit
6
. Thus, the power consumption of the high-frequency power amplifier
100
during small signal operation is reduced.
The power consumption of the high-frequency power amplifier
100
during small signal operation is reduced by controlling the voltage applied to the second gate of the dual gate FET
8
. However, the input impedance-matching circuit
3
and the output impedance-matching circuit
4
are electrically unmatched. This is because the input/output impedance of the dual gate FET
8
significantly changes as the voltage applied to the second gate changes. As a result of the unmatched input/output impedance, the input/output loss is increased and the input/output frequency characteristic is disturbed.
Accordingly, in the field of high-frequency power amplification, there is a demand for a FET in which the input/output impedance does not substantially change even when the voltage of the second gate is controlled in order to reduce the power consumption in small signal operation, and a power amplifier including such a FET.
SUMMARY OF THE INVENTION
According to one aspect of the invention, a transistor includes a source region; a drain region; a channel region interposed between the source region and the drain region; and at least a first gate electrode and a second gate electrode provided on the channel region. At least one of the first and second gate electrodes traverses substantially an entire width of the channel region. At least another one of the first and second gate electrodes traverses a part of the width of the channel region.
According to another aspect of the invention, a transistor includes a plurality of source regions and a plurality of drain regions alternately arranged with each other; a channel region interposed between a respective pair of the plurality of source regions and the plurality of drain regions; at least a first comb-shaped gate electrode and a second comb-shaped gate electrode having branches interdigitated with each other on the channel regions, a source electrode connected to the plurality of source regions; and a drain electrode connected to the plurality of drain regions. At least one of the first and second comb-shaped gate electrodes traverses an entire width of the channel regions. At least another one of the first and second comb-shaped gate electrodes traverses a part of the width of the channel regions.
According to still another aspect of the invention, a transistor includes a plurality of source regions and a plurality of drain regions alternately arranged with each other; a channel region interposed between a respective pair of the plurality of source regions and he plurality of drain regions; at least a first comb-shaped gate electrode and a second comb-shaped gate electrode having branches interdigitated with each other on the channel regions; a source electrode connected to the plurality of source regions; and a drain electrode connected to the plurality of drain regions. At least one of the first and second comb-shaped gate electrodes traverses an entire width of all the channel regions. At least another one of the first and second comb-shaped gate electrodes traverses an entire width of at least one of the channel regions.
According to still another aspect of the invention, a power amplifier includes one of the above-described transistors; an input terminal for receiving a signal; an output terminal for outputting the signal; an input impedance-matching circuit connected between the input terminal and the first gate electrode; an output impedance-matching circuit connected between a drain electrode of the transistor and the output terminal; a first DC voltage circuit connected to the first gate electrode; a second DC voltage circuit connected to the second gate electrode; and a third DC voltage circuit connected to the drain electrode.
In one embodiment of the invention, a power amplifier further includes a control circuit for controlling an output from the first DC voltage circuit and an output from the second DC voltage circuit.
According to still another aspect of the invention, a power amplifier system includes a plurality of the above-described power amplifiers.
According to still another aspect of the invention, a transistor includes a plurality of island regions each including a source region, a drain region, and a channel region; at least a first gate electrode, a second gate electrode and a third gate electrode provided on channel regions; a source electrode connected to the source regions; and a drain electrode connected to the drain regions. One of the first, second and third gate electrodes traverses an entire width of all the channel regions. The rest of the first, second and third gate electrodes traverse an entire width of the respective channel region.
According to still another aspect of the invention, a transistor includes a plurality of island regions each including a plurality of source regions, a plurality of drain regions, and a plurality of channel regions interposed between respective pairs of the plurality of source regions and the plurality of drain regions; at least a first comb-shaped gate electrode, a second comb-shaped gate electrode and a third comb-shaped gate electrodes having branches interdigitated with each other on the channel regions; a source electrode connected to the source regions; and a drain electrode connected to the drain regions. One of the first, second and third comb-shaped gate electrodes traverses an entire width of all the channel regions. The rest of the first, second and third comb-shaped gate electrodes traverse an entire width of the respective channel region.
According to still another aspect of the invention, a power amplifier including one of the above-described transistors; an input terminal for receiving a signal; an output terminal for outputting the signal; an input impedance-matching circuit connected between the input terminal and the first gate electrode; an output impedance-matching circuit connected between a drain electrode of the transistor and the output terminal; a first DC voltage circuit connected to the first gate electrode; a second DC voltage circuit connected to

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