Method of producing semiconductor device comprising...

Details Method of producing semiconductor device comprising... Method of producing semiconductor device comprising...

2000-05-04

2001-03-13

Booth, Richard (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S598000, C438S599000

Reexamination Certificate

active

06200888

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor device and a method of producing the same. Particularly, the invention relates to a semiconductor device, such as one having a chip size package (CSP) structure, in which a surface of the semiconductor chip is covered by a layer of insulation material, such as a layer of polyimide, and a layer of aluminum (Al) forming electrodes or pads at the surface of the chip is not covered by the insulation material layer and is exposed.
As used herein, the term “semiconductor chip” means each of the individual semiconductor elements which are fabricated in a wafer and are not yet cut from the wafer as well as each of individual semiconductor elements which are cut from the wafer and separated from each other, unless specifically indicated.
2. Description of the Related Art
In a typical and conventional semiconductor device, an Al layer, which provides electrodes, is formed on a chip of silicon (Si), and it is common that wiring lines are attached to the electrodes of the Al layer by wire bonding.
In a semiconductor device of a CSP structure which has been developed to meet the latest needs of miniaturization of semiconductor devices and fabrication of components therein at a higher density, a polyimide layer as an insulation film is formed on a wafer in which many semiconductor elements (semiconductor chips) are fabricated and, on the polyimide layer, rerouting lines are formed, the rerouting line connecting an electrode or pad of conductor layer, typically Al layer, of each semiconductor chip through a via-hole formed in the polyimide layer to an external electrical circuit outside a package. In other words, the semiconductor device of a CSP structure requires a process for making rerouting lines on the insulation film of the chip so that the rerouting lines are electrically connected with the conductor layer of the chip.
In all of the cases where a wiring line is thus attached to an electrode or pad of an Al layer of a semiconductor chip, the electrodes or pads of the Al layer are exposed and, consequently, an oxidized film formed due to natural oxidation, so-called a “naturally oxidized film”, is present on the surface of the Al layer. The presence of such an oxidized film is not preferable in that it increases a contact resistance between the electrode or pad and wiring line to be connected with it, and eventually makes electrical continuity between them defective. Accordingly, a treatment for the removal of such an oxidized film is needed.
In a process in which a wiring line is attached by wire bonding, a satisfactory electrical connection between an electrode (an Al layer) of a chip and the wiring line is established by using, for example, ultrasound or heat to mechanically break the oxidized film.
On the other hand, in a process in which rerouting lines are formed on an insulation film of a chip, satisfactory electrical connection between an electrode (an Al layer) of a chip and the rerouting line is established by removing the oxidized film by, for example, a treatment in which positive ions, typically Argon ions (Ar
+
), in a plasma are accelerated and are bombarded against the surfaces of the respective chips of a target wafer (ion bombardment or ion milling) is carried out prior to the formation of a metallic thin film for the rerouting lines by sputtering.
However, such an ion bombardment simultaneously has also effect on the surface of the polyimide layer as an insulation film exposed at the top of the wafer, resulting in breakage of some of bonds between atoms in the polyimide layer and loss of its insulation properties. Consequently, the insulation resistance of the polyimide layer can be largely decreased.
Such a problem is not desired in a semiconductor device having a CSP structure, but can commonly arise with a semiconductor device if the device generally has an insulation film, such as a layer of polyimide, covering the surface of a semiconductor chip, and an Al layer for electrodes or pads is not covered by the polyimide layer and is exposed.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a method of producing a semiconductor device comprising an insulation film covering a semiconductor chip so as to expose electrodes or pads fabricated in the chip and wiring lines formed on the insulation film and connected to the respective electrodes or pads, the insulation film having sufficient insulation properties, and the electrode of the chip being satisfactorily connected to the wiring line on the insulation film.
It is another object of the invention to provide such a semiconductor device.
According to the invention, a semiconductor device comprising an insulation film covering a semiconductor chip so as to expose electrodes or pads fabricated in the chip and wiring lines located on the insulation film and connected to the respective electrodes or pads is produced by a method which comprises:
providing a semiconductor chip provided with an insulation film covering the chip so as to expose a conductor layer for electrodes or pads fabricated in the chip,
ion milling the surface of the chip, provided with the insulation film, by a mixed gas of argon and hydrogen,
forming a patterned conductor layer for wiring lines on the ion-milled surface of the chip, and
dry etching the surface of the chip provided with the insulation film and the patterned conductor layer by nitrogen gas.
In the method of the invention, prior to the formation of the patterned conductor layer for wiring lines on the insulation film, the surface of the chip provided with the insulation film is ion-milled to remove a naturally oxidized film at the surface of the conductor layer for electrodes (or pads) by ion bombardment. This makes it possible to establish satisfactory electrical connection between the electrodes of the chip and the wiring line which is subsequently formed.
The ion milling is carried out using the mixed gas of argon and hydrogen, which can reduce a decrease in the insulation resistance of the insulation film due to the ion bombardment, compared with the case of the use of prior ion milling gas consisting of argon alone.
Also, in the method of the invention, after the formation of the patterned conductor layer for wiring lines on the insulation film, the surface of the chip provided with the insulation film is sputter-etched using nitrogen gas, unlike argon gas of prior art, which can restore an insulation resistance of the insulation film, which may have been more or less lowered by the former ion milling, to a sufficient value.
By the combination of the ion milling using a mixed gas of argon and hydrogen and the dry etching using nitrogen gas, the invention can provide a semiconductor device comprising an insulation film covering a semiconductor chip so as to expose electrodes or pads fabricated in the chip and wiring lines located on the insulation film and connected to the respective electrodes or pads, the insulation film having sufficient insulation properties, and the electrode of the chip being satisfactorily connected to the wiring line on the insulation film to secure electrical continuity between them.
The invention also provides a semiconductor device produced by the method of the invention, the semiconductor device comprising an insulation film covering a semiconductor chip so as to expose electrodes or pads fabricated in the chip and wiring lines located on the insulation film and connected to the respective electrodes or pads, wherein the insulation film is ion-milled by a mixed gas of argon and hydrogen, and is also sputter-etched by nitrogen gas.


REFERENCES:
patent: 5304510 (1994-04-01), Suguro et al.
patent: 5470791 (1995-11-01), Suguro et al.
patent: 5654237 (1997-08-01), Suguro et al.
patent: 2-246246 (1990-10-01), None

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