Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1996-07-19
2001-09-18
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S500000
Reexamination Certificate
active
06291851
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device which has oxide layers for electrically isolating electronic elements having a floating gate, e.g., an EEPROM, formed on a semiconductor substrate, and a method of manufacturing the same.
MOS integrated circuits have field oxide layers to electrically isolating electronic elements provided in one region from those in other regions of a semiconductor substrate. It is well known that the field oxide layer is formed by a LOCOS technique.
To form a field oxide layer by the LOCOS technique, a silicon substrate is first exposed to a high temperature ambient of approximately 950° C. to form an SiO
2
pad oxide film over the surface thereof. Subsequently, a nitride film of Si
3
N
4
is deposited by the CVD method over the pad oxide film, followed by formation of a photoresist layer over the nitride film. The photoresist layer is then treated by a photolithography technique to pattern the nitride film. Thereafter, the oxide film is selectively oxidized at a temperature of approximately 1000° C. to grow into a field oxide layer with a thickness of approximately 10000 angstroms. In the selective oxidation of the oxide film, the patterned nitride film is utilized as a mask for covering a region where electronic elements are to be formed.
After formation of the field oxide layer together with other electronic elements, a protective insulation layer is formed by the CVD method to a thickness of approximately 10000 angstroms over the entire surface of the substrate. Contact holes are then opened in the insulation layer to allow formation of interconnections of a conductive metal for electrically connecting between electrodes through contact holes, thus providing a semiconductor device.
During the LOCOS process, oxidation proceeds in unmasked portion of the pad oxide film in a direction of thickness thereof, but also toward a direction parallel to the surface of the substrate. To this end, there necessarily occurs bird's beaks, each of which projects from a lateral end of a field oxide layer toward an underside of the nitride film adjacent thereto.
In the conventional electrical isolation with field oxide layers, as an oxide film oxidizes to grow, bird's beaks grow toward an adjacent area where electronic elements are to be formed, thereby reducing the area of active regions. This prevents increase of packing density as well as miniaturization for a device.
More specifically, let us consider the effect of bird's beaks on active regions of a semiconductor substrate. Now, as shown in FIG.
5
(
a
), a pad oxide film
32
is formed to a thickness of, e.g., 500 angstroms over the surface of a substrate
31
. A nitride film
33
is deposited to a thickness of
1500
angstroms over the pad oxide film
32
and patterned by the photolithography technique so that the diameter of an opening in the nitride film is 0.8 &mgr;m. The pad oxide film
32
is selectively grown by the LOCOS technique to a field oxide layer with a thickness of approximately 10000 angstrom under the ordinary condition. In this case, bird's beaks will occur in lateral ends of field oxides, which extend laterally by an amount of approximately 0.8 &mgr;m on both ends of the opening as viewed in the figure. Consequently, the field oxide layer
35
, if the bird's beak considered, has a width of as large as approximately 2.4 &mgr;m with respect to a direction parallel to the surface of the substrate, as shown in FIG.
5
(
b
).
In order to avoid the effect of the bird's beaks on the active region, if the growth of the oxide layer is suppressed to a thickness of 5000 angstroms by control of oxidation time period, then the amount of the bird's beak becomes approximately 0.4 &mgr;m on each side of the opening. Thus, the growth in width of an entire field oxide layer
35
′ can be reduced to as small as approximately 1.6 &mgr;m, as shown in FIG.
5
(
c
). It is therefore preferred to reduce small the thickness of a field oxide layer, in view of the effect of bird's beaks.
In the meanwhile, semiconductor device with high packing density generally employs electronic elements operable on a high voltage, e.g. 12V, necessitating a thickness for field oxide layers of approximately 10000 angstroms for appropriately providing electrical isolation. It is therefore difficult to sufficiently reduce the entire size of a semiconductor device.
Under the above-stated circumstances, Japanese Provisional Patent Publication (Kokai) No. H7-130725discloses a method to prevent the effect of bird's beaks by adjusting the thickness of field oxide layer in accordance with voltages for driving electronic elements provided in active regions isolated by the field oxide layers. In the disclosure, an active region in which low-voltage electronic elements with a thin gate oxide film are provided is isolated by a thin field oxide layer. On the other hand, an active region in which high-voltage electronic elements with a thick gate oxide film are provided is isolated by a thick field oxide layer, thereby preventing the problem of electrical isolation as well as reducing the size of an entire device.
In the method of the Japanese provisional patent publication, however, an electronic element with a floating gate necessitates a thin gate oxide film between the floating gate and the substrate, which is necessarily placed in an active region isolated by a thin field oxide layer.
In the meanwhile, an electronic element such as an EEPROM having a floating gate operates on a high voltage, e.g., 12V during writing or erasing of information. Consequently, it is difficult to appropriately provide electrical isolation with the thin field oxide layer. Furtheremore, the method of the above Japanese provisional patent publication does not include means for forming channel stop layers underneath field oxide layers. In particular, it is difficult to provide channel stop layers uniformly beneath both the thinner and thicker field oxide layers by the disclosed method. That is, a first opening is formed in a nitride layer in a place where a thicker field oxide layer is to be grown, and then a second opening is formed in the nitride film in another place where a thinner field oxide layer is to be grown, continuing oxidation to provide both the thinner and thicker field oxide layers. Consequently, if an impurity is implanted after the formation of the second opening, the presence of grown oxide layer in the first opening makes difficult uniform formation of a channel stop layer.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a semiconductor device and a manufacturing method thereof, which device has field oxide layers providing appropriate electrical isolation against applied high voltage and facilitating for providing a thin gate oxide film, thereby providing miniaturization as well as high packing density for the device.
It is another object of the invention to provide an EEPROM as a semiconductor device improved in rewritability, and a method of manufacturing the same.
It is further object of the invention to provide a method of manufacturing a semiconductor device having thin and thick field oxide layers, wherein channel stop layers are uniformly formed so that electrical isolation is given to electronic elements even with minimized thickness of field oxide layers.
According to one aspect of the present invention, there is provided a semiconductor device having a semiconductor substrate of a first conductivity type, field oxide layers formed on the surface of the substrate, and an electronic element having a floating gate formed in an active region defined by the field oxide layers of the substrate, wherein the electronic element comprising:
oxide layers formed in a thickness thinner than the field oxide layer to define a channel region in the surface of the substrate;
a gate oxide film formed thinner than the oxide layer over the channel region of the substrate;
a source region of a second conductivity type formed to extend underneath one of
Hashimoto Koji
Matsumoto Yuji
Arent Fox Kintner & Plotkin & Kahn, PLLC
Chaudhuri Olik
Rohm & Co., Ltd.
Weiss Howard
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