Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-03-08
2001-08-14
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S778000, C257S565000
Reexamination Certificate
active
06274490
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to a method of annealing a semiconductor device at high pressure and, more specifically, to a method of conducting a high pressure anneal employing a hydrogen isotope.
BACKGROUND OF THE INVENTION
The use of silicon in devices, such as thin film metal oxide field effect transistors (MOSFETs), is well known. Equally well known is the performance degradation of these devices that occurs with time. It is believed that this efficiency degradation is caused, in part, by hot carriers conducting through the channel region from source to drain. Hot carriers are electrons or holes that have high kinetic energy, which is imparted to them when voltages are applied to electrodes of the device and between the source and drain. Thus, defects within the device may arise from current flow within the device over a period of time. It is further believed that these defects reduce the mobility and lifetime of the carriers and cause degradation of the device's performance. The hot carriers impact with silicon hydrogen (Si—H) bonds at a silicon dioxide/silicon (SiO
2
/Si) interface. Once the Si—H bonds are broken, the silicon dangling bonds at the interface form interfacial trap defects that reduce mobility and silicon dioxide lifetimes. To alleviate the problems caused by such dangling bonds, a hydrogen passivation process has been adopted and has become a well-known and established practice in the fabrication of such devices.
During the hydrogen passivation process, it is thought that the defects that affect the operation of semiconductor devices are removed when the hydrogen bonds with the silicon at the dangling bond sites. While the hydrogen passivation process eliminates the immediate problems associated with these dangling bonds, it does not eliminate degradation permanently because the hydrogen atoms that are added by the passivation process can be “desorbed” or removed from the previous dangling bond sites by processing conditions or by the current flow. Under such operating conditions, the hydrogen atoms, which were added by the hydrogen passivation process, can be knocked off by the processing conditions or hot carriers. This hydrogen desorption results in aging or degradation of the device's performance.
For example, during the manufacturing process, the device may be passivated with hydrogen. However, in some instances, the hydrogen may be driven off by subsequent anneal steps that may be conducted on the device. Additionally, as mentioned above, it is believed that the hot carrier flow through the device is another reason for the efficiency degradation of the above-mentioned devices. Under regular operating conditions, the hydrogen atoms, which were added by the hydrogen passivation process, are knocked off by charge carriers, and result in aging or degradation of the device's performance. The performance of the device decreases with exposure to radiation or an electric field, which limits the useful life of the device. Moreover, since the SiO
2
/Si or dielectric/silicon interface is formed at a very early stage of processing, the hydrogen has to diffuse through many layers of material before reaching the SiO
2
/Si interface. Thus, it is inefficient to do a hydrogen anneal.
To combat the problems associated with the use of hydrogen, the semiconductor manufacturing industry has most recently discovered that deuterium provides certain advantages over hydrogen. Because of its greater mass, deuterium atoms are not as easily removed by hot carrier flow, yet at the same time, they provide the passivation necessary to prevent or inhibit the degradation of the device. Thus, deuterium is believed to be a very good substitute for hydrogen. Unfortunately, however, it is believed that deuterium may diffuse much slower than the hydrogen, which requires a longer annealing time at added cost. In such instances, it is believed that there will still be an unacceptable loss of deuterium after the device's final anneal due to the fact that deuterium may be driven from the critical interfaces by the high temperatures associated with annealing processes.
Accordingly, what is needed in the art is a method of manufacturing a semiconductor device that provides a method of passivation such that the device does not experience levels of efficiency degradation associated with conventional processes. The present invention addresses these needs.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a method of passivating a semiconductor device having a capping layer formed thereover, comprising: (1) subjecting the semiconductor device to a high pressure and (2) exposing the semiconductor device to a passivating gas comprising a hydrogen isotope. The high pressure causes the passivating gas, such as a deuterated passivating gas, to penetrate the capping layer and thereby passivate the semiconductor device. The method provided by the present invention is, therefore, particularly useful in those instances where a final passivation step is desired after the formation of the capping layer. It is believed that the hydrogen isotope, bonds to dangling bond sites within the semiconductor device, which are most often present at a silicon/silicon dioxide interface. Further, because of their larger mass, these hydrogen isotope atoms are not easily removed by electron flow during the operation of the device as is the case with the lighter hydrogen atoms.
Thus, the present invention, in a broad scope, provides a method of passivating a semiconductor device through a capping layer with a material that not only occupies dangling bond sites and reduces the effects of hot carrier electron degredation, but is also less susceptible to removal during operation of the device.
In one particularly advantageous embodiment, the semiconductor device is subjected to a pressure greater than about 10 atmospheres. In a more advantageous embodiment, the semiconductor device is subjected to a pressure ranging from about 10 atmospheres to about 30 atmospheres. However, the passivation pressure may vary, depending on factors like the thickness of the barrier cap, the temperature used during the passivation process and the duration of the passivation process.
In another aspect of the present invention, subjecting the semiconductor device to a high pressure includes subjecting the semiconductor device to a high pressure at a temperature of less than about 400° C. In certain embodiments, the semiconductor device is subjected to a high pressure or a temperature of less than about 400° C. for a period of about 10 minutes. In other embodiments the semiconductor device is subjected to either or both for a period greater than 10 minutes.
A method of manufacturing a semiconductor device having a capping layer formed thereover is also provided. In this embodiment the method includes: (1) forming transistors on a semiconductor wafer, (2) forming interconnect layers, and electrically connecting the interconnect layers with the transistors to form an integrated circuit (IC), (3) forming a capping layer over the interconnect layers, and (4) passivating the semiconductor device with a passivating gas at a high pressure to cause the passivating gas to penetrate the capping layer and thereby passivate the semiconductor device.
In another aspect of the invention the semiconductor device may be a CMOS device, a BiCMOS device, a Logic, an analog device, a Bipolar device, a DRAM device or a FLASH integrated circuit. In other embodiments of the invention the transistors have a silicon/silicon dioxide or silicon/oxynitride interface, the capping layer comprises silicon nitride (SiN) and the capping layer is formed over an outermost layer of the semiconductor device.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the inven
Chyan Yih-Feng
Ma Yi
Le Dung A
Lucent Technologies - Inc.
Nelms David
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