Self-adjusting elasticity data buffer with preload value

Details Self-adjusting elasticity data buffer with preload value Self-adjusting elasticity data buffer with preload value

1999-02-05

2001-05-15

Lee, Thomas (Department: 2782)

Electrical computers and digital data processing systems: input/

Input/output data processing

Flow controlling

C710S029000, C710S033000, C710S052000, C710S058000, C710S060000

Reexamination Certificate

active

06233629

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to buffers used within data communications systems and more particularly to a self-adjusting elasticity buffer for processing packets or streams of data. A “packet” or “stream”, as used within context of this disclosure, is a collection of individual data units, such as 2-bit, 4-bit or 8-bit words, which form a contiguous group of data.
2. Description of Related Art
Data communication devices, such as shown in
FIG. 1
, often use elasticity buffers to re-synchronize a data stream from one clock domain to another. Within the receiver (RX), the data stream is written into an elasticity buffer in accordance with a receive clock signal (RX CLK), i. e., write clock, in the form of original receive data (RX DATA), i. e., write data. The RX DATA is subsequently read out of the buffer in accordance with a transmit clock signal (TX CLK), i. e., read clock. Thus when the read data is received by the transmitter it is synchronous with the transmit clock.
In a typical implementation, the elasticity buffer is implemented using a first-in first-out (FIFO) buffer that writes data words using a write clock and reads the data words using a separate read clock. With reference to
FIG. 2
, each of the words in the data stream is individually written into the buffer in individual cells beginning at 0, as indicated by the write pointer. Once data is written into the cell numbered N, data is read from the buffer beginning at cell 0, as indicated by the read pointer. The write pointer continues to write data to buffer cells N+1 through 2N as the read pointer continues to read data. After writing data to the 2N cell the write pointer begins writing data to the 0 cell again, thus the buffer is circular in nature.
Ideally, when the read clock and write clock are operating at the same frequency, the read pointer lags the write pointer by N words through the entire write/read cycle. However, the read clock and write clock inputs to the elasticity buffer are often offset in frequency. The frequency offset causes relative movement between the read and write pointers which, overtime increases or decreases the gap between the two pointers depending on the frequencies of the write and read clocks. This relative movement of the read and write pointers is referred to as “drift.” When data is being written to the buffer faster than it is being read, the write pointer drifts toward the read pointer and eventually passes the read pointer. This condition is referred to as an “overrun” because the write pointer writes data to a buffer cell which contains data which has not yet be read by the read pointer. When data is being read from the buffer faster than it is being written, the read pointer drifts toward the write pointer and eventually passes the write pointer. This condition is referred to as an “underrun” because the read pointer reads data from a buffer which has not yet had data written to it by the write pointer. Either an overrun or underrun condition results in the corruption of data. The system typically includes a mechanism for detecting these conditions and providing an error signal.
Current designs of the elasticity buffer attempt to compensate for overrun and underrun conditions by sizing the elasticity buffer to accommodate for the maximum “frequency offset” between the write and read clocks. The frequency offset is relative to the data rate of the system and is defined by the following equation:
freq
⁢
 
⁢
offset
=
&LeftBracketingBar;
W
freq
-
R
freq
&RightBracketingBar;
D
rate
(Eq. 1)
where: W
freq
=frequency of the write clock
R
freq
=frequency of the read clock
D
rate
=data rate of the system
Accordingly, if the data rate of the system is 50 Mhz and the difference between the write clock and read clock frequencies is 10 kHz the frequency offset is 0.0002. This value is commonly expressed as 200 part-per-million (ppm).
In a standard elasticity buffer the FIFO size is at least 2N, where N is defined by the following equation:
N=freq offset
max
×data length
max
  (Eq. 2)
where: freq offset
max
=the maximum frequency offset as determined using Eq. 1
data length
max
=the maximum length of the data stream in words
For a maximum frequency offset of 200 ppm and a maximum data stream length of 40,000 words, N equals 8. Thus, the size of the standard elasticity buffer is 16. In operation, the elasticity buffer is loaded halfway, to a “preload value” of N, before the reading of data begins. This allows the read pointer to drift N words in either direction without causing a loss of data by an overrun or underrun condition. This preloading, however, introduces an initial delay in the reading of date, this delay is referred to as a latency and is described further below.
Disadvantages associated with this implementation of the elasticity buffer include the FIFO size and latency. As mentioned above, the size of the buffer is at least 2N in order to accommodate the maximum possible drift between the read and write pointers. Latency is the amount of time between the writing of a word into the buffer and the reading of a word from the buffer. The latency between the data in and data out of the buffer are shown in
FIGS. 3
a
through
3
c
. As shown in
FIG. 3
a
, the latency at the start of the data stream is N, because N words are written before the read pointer starts reading. At the end of the data stream, the latency is between 0 and 2N words, depending on the relative frequencies of the write and read clocks. If the clocks are running at the same frequency the latency is N, as shown in
FIG. 3
a
. If the read clock is running faster than the write clock the latency approaches zero, as shown in
FIG. 3
b
, whereas if the write clock is running faster than the read clock the latency approaches 2N, as shown in
FIG. 3
c
. As the latency approaches 2N the possibility of the present data stream interfering with a subsequent data stream increases.
Thus there exists a need in the art to provide a buffer of reduced size with reduced latency at the end of a data stream. The present invention fulfills these needs.
SUMMARY OF THE INVENTION
Briefly, and in general terms, the invention relates to methods of, and systems for, processing data through a buffer.
In one embodiment, the invention relates to a method of processing a plurality of data packets, each having a number of data units, through a buffer in accordance with a write clock and a read clock. The buffer has a plurality of sequentially numbered storage cells. The method includes the steps of selecting an initial preload value; writing the data units into the storage cells using a write pointer operating in accordance with the write clock; and when the storage cell of the buffer having the number equal to the preload value has been written to, reading data units from the storage cells using a read pointer operating in accordance with the read clock. The method further includes the steps of determining the relative frequencies of the write and read clocks; and for subsequent data packets, selectively adjusting the preload value to compensate for differences between the write frequency and the read frequency.
By adjusting the preload value to compensate for differences between the write frequency and the read frequency, the present invention prevents the over writing of data into a storage cell which contains data which has not yet been read and prevents the reading of storage cells which have not yet had data written to.
In an additional aspect of this embodiment the write pointer and read pointer each have a counter associated therewith and the step of determining the relative frequencies of the write and read clocks includes the step of, after the start of the reading of data by the read pointer and during the writing of data from the first data packet, comparing the value of the write-pointer counter with the value of the read-pointer counter. In a further aspect, the step of selectively adjusting the prelo

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