Method of strain engineering and impurity control in III-V...

Details Method of strain engineering and impurity control in III-V... Method of strain engineering and impurity control in III-V...

2000-09-06

2001-08-14

Mulpuri, Savitri (Department: 2812)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

C438S483000

Reexamination Certificate

active

06274399

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the manufacture of optoelectronic devices, in particular towards the strain engineering and impurity control in the grown layers.
BACKGROUND
Currently, there is no substrate material that can suitably match the lattice constants and thermal expansion coefficients of the compounds and alloys in the III-V nitride materials system. Thus, the ability to grow high-quality films of the III-V nitrides (AlInGaN) by standard epitaxial techniques (e.g., organometallic vapor phase epitaxy (OVPE), molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE)) on mismatched substrates, like sapphire and silicon carbide, is a key component to producing high-quality layers and achieving optimal device performance. Growth of AlInGaN layers at typical growth temperatures (>1000° C.) results in films consisting of a mosaic assemblage of hexagonal nuclei. These layers exhibit a very rough morphology, very high background donor concentrations and are prone to cracking.
Using nucleation or buffer layers, deposited at low temperature (400-900° C.) on sapphire and at higher temperatures on silicon carbide, prior to high temperature growth, allows the crystal grower to dramatically improve the quality of epitaxial nitride films. Commonly, these buffer layers consist of AlN, GaN or some composition intermediate to these two binaries. The insertion of this low temperature buffer layer provides the means by which drastic differences in: 1) lattice parameter, 2) thermal expansion, 3) surface energy and 4) crystallography between the substrate, e.g. sapphire, and the nitride epilayer are overcome.
Nitride-based light-emitting diodes (LEDs) typically include a substrate, a nucleation or buffer layer, an n-type conducting layer, an active layer, a p-type conducting layer, and metal contacts to the n- and p-type layers. A schematic of a generic LED is shown in FIG.
1
. Nitride LEDs typically have the structure shown in FIG.
2
. The nucleation layer is commonly AlN, GaN or AlGaN.
An added complication when dealing with nitride epitaxy is the problem of cracking. Cracking arises when the epitaxial films are pulled in tension either due to: 1) lattice mismatch between substrate and film, 2) thermal expansion coefficient mismatch between substrate and film, 3) high doping levels and 4) lattice mismatch due to intentional compositional modulations during the growth of a nitride device. Typical nitride-based devices exhibit heavily doped layers, where the dopant concentrations often exceed 10
18
-10
19
cm
−3
, and several compositional heterointerfaces. Data for the lattice parameter and thermal expansion coefficient for the nitrides and the common substrates (SiC and sapphire) are shown below in Table I
TABLE I
Properties of the nitrides and selected substrates
Material
GaN
AlN
InN
sapphire
6H-SiC
Lattice Constant (Å)
a
3.189
3.112
3.548
 4.758
 3.08
c
5.185
4.982
5.76 
12.991
15.12
Thermal Expansion
Coefficient
(/K
−1
)
a
5.59 × 10
−6
4.2 × 10
−6
4 × 10
−6
7.5 × 10
−6
 4.2 × 10
−6
c
3.17 × 10
−6
5.3 × 10
−6
3 × 10
−6
8.5 × 10
−6
4.68 × 10
−6
While the problems associated with lattice- and thermal-mismatch can be adequately addressed using existing nucleation layer technologies and by controlling the heating and cooling conditions associated with growth, cracking due to doping and intentional compositional fluctuations cannot be solved by such methods.
Cracking presents a considerable problem when GaN layers are doped n-type with Si (which has an ionic radius more than 30% smaller than Ga, the atom for which it substitutes) and when layers of differing compositions are deposited on one another. The second case is especially troublesome when the layer grown on top has a smaller a-axis lattice parameter than the layer on which it is grown, e.g. AlN or AlGaN deposited on GaN, due to the very rigid elastic constants exhibited by the III-V nitrides. Additionally, heterostructures consisting of nitride layers generally exhibit registry along the a-axis, which is parallel to the substrate film interface, and are distorted only along the c-axis, which is perpendicular to the substrate film interface. Thus, when a layer has a smaller relaxed a-axis parameter than the layer on which it is grown, tensile stress is induced in that layer in order to keep the interface in registry.
Another problem that the crystal grower typically encounters is that of unwanted impurities in otherwise pure crystals. Among the common impurities that can occur during the process of crystal growth, regardless of the method employed, oxygen is generally considered to be the most troublesome. Oxygen can severely limit the grower's ability to control conductivity, strain and optical luminescence. Sources of oxygen can include, but are not limited to, reactant sources, reactor walls and hardware, graphite susceptors or boats and even the substrate wafers themselves.
SUMMARY
In the present invention, an interfacial layer is added to a light-emitting diode or laser diode structure to perform the role of strain engineering and impurity gettering. A layer of Al
x
In
y
Ga
1−x−y
N (0≦x≦1, 0≦y≦1) doped with Mg, Zn, Cd can be used for this layer. Alternatively, when using Al
x
In
y
Ga
1−x−y
N (x>0), the layer may be undoped. The interfacial layer is deposited directly on top of the buffer layer prior to the growth of the n-type (GaN:Si) layer and the remainder of the device structure. The thickness of the interfacial layer varies from 0.01-10.0 &mgr;m.
The interfacial layer increases device reliability and reproducibility because the problems associated with cracking, layer coalescence, and impurity trapping are relegated to a region of the device that is not active during device operation. To illustrate, the interfacial layer “getters” or traps the residual impurities (such as O) in the initial layer of the structure. In addition, this process also cleanses the chamber and the reactor components making them free of undesired impurities which would be present later when the more critical layers, e.g. the active layer or the p-type layers, in the structure are grown. The preferred embodiments for this layer include GaN:Mg and AlGaN for the composition of the interfacial layer because both Mg and Al have a high affinity for oxygen. Additionally, the use of this interfacial layer reduces the strain and lessens the driving force for cracking by changing the nature of the strain state of the nitride epilayer.


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