Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-03-23
2001-05-08
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000, C257S300000, C257S532000
Reexamination Certificate
active
06229167
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing it, and more particularly to a semiconductor device having a ferroelectric layer and a method of manufacturing such a device.
2. Description of the Related Art
As a semiconductor device having a ferroelectric layer, a ferroelectric memory is previously known.
FIGS. 14 and 15
partially show the sectional structure of a conventional ferroelectric memory. The ferroelectric memory includes a ferroelectric capacitor FC composed of a ferroelectric film FL and a lower electrode LE and an upper electrode UE sandwiching the ferroelectric film therebetween, a MOSFET, etc. The ferroelectric memory has been manufactured in the following manner.
First, as seen from
FIG. 14
, a field oxide film
4
for element isolation is formed on a semiconductor substrate
2
. A MOSFET is formed within an element region encircled by the field oxide film
4
. In this figure, an N
+
diffused layer
6
(source regionor drain region) is present on a P-type Si substrate surface. On the N
+
diffused layer
6
, a ferroelectric capacitor FC is formed through an interlayer insulating film
8
. The ferroelectric capacitor FC has a structure in which the lower electrode LE, ferroelectric layer FL and upper electrode UE are stacked in this order.
Contact holes
18
a
and
18
b
are formed in the interlayer insulating film
8
. The contact hole
18
a
is formed so as to reach the N
+
diffused layer
6
. The contact hole
18
b
is formed to reach the upper electrode UE of the ferroelectric capacitor FC.
As seen from
FIG. 15
, on the resultant surface, a titanium (Ti) layer
10
, a barrier metal layer
12
of titanium nitride (TiN), an aluminum wiring layer
14
and a passivation film
16
are formed. By carrying out any heating step after the Ti layer
10
is formed, only a contact portion
10
a
between the Ti layer
10
and the N
+
diffused layer is silicified as silicide
This silicide portion serves to reduce the connection resistance between the Al wiring layer
14
and the N
+
diffused layer
6
.
However, the conventional ferroelectric memory has the following problems. It is known that the ferroelectric thin film does not exhibit ferroelectricity at a certain high temperature. The reason is not necessarily clear. When the ferroelectric material is further heated, it does not return to its original state. In short, the ferroelectric material looses the ferroelectricity non-reversibly at a certain temperature or higher.
For this reason, in order to avoid the deterioration of the ferroelectric layer FL, the heating temperature for silicifying cannot be risen so high. On the other hand, at such a temperature, the titanium material cannot be silicified sufficiently. Namely, the Ti layer
10
at the contact portion
10
a
is not silicified sufficiently. As a result, the contact portion
10
a
between the Ti layer
10
and the N
+
diffused layer
6
has somewhat of property of a Schottky diode. Namely, the contact resistance does not become so low, and has also characteristic dependent on a voltage. This impede the high-speed response of the memory.
In order to solve such a problem, a technique of using a platinum (Pt) layer in place of the Ti layer
10
can be proposed. Since platinum is silicified at a lower temperature than titanium is, it can be silicified sufficiently at a temperature lower than the temperature when the ferroelectric layer FL is deteriorated.
However, since the platinum exhibits a strong reduction/catalysis function, if any step is thereafter effected within a reduction atmosphere, the reduction of the ferroelectric material which is an oxide is promoted owing to the presence of platinum not silicified. Thus, the ferroelectric material will be deteriorated. Therefore, after the silicifying step, the non-reacted platinum must be removed. However, the platinum cannot but be removed using aqua regia. It is difficult to effect such a step in a common semiconductor processing process.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the problem described above and to provide a semiconductor device which can give a low connection resistance between a silicon layer and a wiring layer while keeping the function of a ferroelectric layer, and a method of manufacturing such a device.
The semiconductor device according to the first aspect of the present invention is characterized in that the silicide layer contains a silicide layer formed by silicifying at least one metal selected from the group consisting of cobalt (Co), iron (Fe), nickel (Ni), chromium (Cr) and molybdenum (Mo), which can be silicified at a temperature lower than the temperature when the ferroelectric layer is substantially deteriorated and has a substantially very weak reduction/catalysis function for the ferroelectric layer.
Therefore, without deteriorating the function of the ferroelectric layer, the metallic portion which is contact with the silicon layer can be sufficiently silicified. In addition, the metallic portion not silicified does not adversely affect the ferroelectric layer in the post manufacturing steps. Namely, while holding the function of the ferroelectric layer, the connection resistance between the silicon layer and wiring layer can be decreased.
The semiconductor device according to the second aspect of the present invention is characterized in that the silicide layer is made of a metal which is silicified at a temperature lower than the temperature when the wiring layer is substantially deteriorated.
Therefore, even when silicifying is effected after forming the wiring layer, the wiring layer will not be deteriorated. Therefore, it is not necessary to carry out the silicifying step before the step of forming the wiring layer. This increase the freedom of manufacturing steps and reduces the production cost.
The semiconductor device according to the third aspect of the present invention is characterized in that the silicide layer is formed by silicifying a metal which is silicified at a temperature lower than the temperature when a passivation film covering the wiring layer is formed. For this reason, the silicifying can be effected at the temperature when the passivation film is formed. Thus, no heating step dedicated for silicifying is required, thereby further restricting the production cost.
The semiconductor device according to the fourth aspect of the present invention is characterized in that the silicide layer is formed by silicifying a material which is specified in the eighth group—fourth cycle on the periodic table.
Since the metals specified in the eighth group—fourth cycle on the periodic table, i.e. iron, nickel and cobalt can be easily silicified, a silicide layer having low resistance can be formed without deteriorating the ferroelectric material.
Incidentally, iron (Fe) can be easily silicified by heating at 450-550 ° C., for example Fe is heated at 450-550 ° C. to be FeSi,and Fe is heated at 550° C. to be FeSi
2
. The smaller the Atomic weight of the material of the eighth group cycle on the periodic table, the smaller the catalysis effect. Nickel (Ni) can be easily silicified by heating at 200-350 ° C. to be Ni
2
Si, is heated at 350-700° C. to be NiSi, and is heated at 775 °C. to be NiSi
2
. And a resistivity of the NiSi
2
is about 35.8 &OHgr;cm. Catalysis function is small next of Fe.
Further, cobalt (Co) can be easily silicified by heating at 350-500° C. to be Co
2
Si, whose resistivity is about 18 &OHgr;cm, at 550 ° C. to be CoSi, whose resistivity is about 18 &OHgr; cm.
The semiconductor device according to a fifth aspect of the present invention is characterized in that said slicide layer is any one of a nickel silicide layer, cobalt silicide layer and iron silicide layer.
The semiconductor device according to the sixth aspect of the present invention is characterized in that the silicide layer is formed by silicifing a material made of a at least one metal selected from the group consisting of
Loke Steven
Morgan & Lewis & Bockius, LLP
Nguyen Cuong Q
Rohm & Co., Ltd.
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