Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
1997-09-30
2001-05-01
Butler, Dennis M. (Department: 2182)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
Reexamination Certificate
active
06226758
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention generally relates to digital signal processing and more particularly to sample rate conversion.
2. Description of the Related Art
As computer systems find increased applications in every day life, sample rate conversion is becoming necessary in more situations. In general, a sample rate converter (SRC) converts a digital signal having a first sample frequency to a substantially similar digital signal having a second sample frequency. This allows two digital processing systems operating at two different sample frequencies/rates to transfer and process each other's signals. In the audio industry, applications of an SRC are numerous given that no standard sample rate has been adopted for all applications. For example, while a sample rate of 48 kHz is generally used in compact disc (CD) recording, 44.1 kHz is used for CD playback. Similarly, while digital audio tape (DAT) generally has a sample rate of 48 kHz, motion-picture-expert-group (MPEG) and Dolby AC-3 may have sample rates of 48 kHz, 44.1 kHz, 32 kHz, or half of any of these rates. Even if two separate systems have the same nominal sampling rate, they may not share the same master clock, in which case sample rate conversion is still required.
There are three well-known methods of sample rate conversions: digital-analog-digital (DAD), synchronous, and asynchronous. The most direct method of sample rate conversion is DAD. Under the DAD method, a digital-to-analog (D/A) converter converts an input digital signal into an analog signal. The analog signal, which consists of infinitely many repetitions of a frequency spectrum centered on multiples of the sampling frequency is then sent to a lowpass filter to filter out the repetitions of the frequency spectrum and leave only the baseband frequency spectrum. An analog-to-digital (A/D) converter is next used in resampling the analog signal from the A/D converter at sample frequency F
s2
to convert the analog signal back into a digital signal. If F
s2
is greater than 2×(F
s1
/2), Shannon's sampling theorem is met and the original signal can be reconstructed completely from the sampled signal D.
For the synchronous sample rate conversion method, as its name suggests, the input and output sample frequencies originate from a master source. In other words, the input sample frequency is related to the output sample frequency by a ratio of integers (e.g., 3:2). In synchronous sample rate conversion, an input digital signal, which has a sample frequency F
s1
is provided as input to an interpolator. The interpolator interpolates the input digital signal by an integer factor U to increase the sample frequency to that of the least common multiple (LCM) frequency of the two sample frequencies, F
s1
and F
s2
. Generally, in an interpolation operation, samples of value zero are inserted at sample times between the samples of the input signal. Since samples are added while the time span remains the same, the interpolated signal has a higher sampling rate than the input signal. The interpolated signal is next provided as input to a lowpass filter to eliminate unwanted periodic repetitions of the frequency spectrum between the frequency range 0<f<2&pgr;. The lowpass filter outputs a filtered signal to a decimator which downsamples the filtered signal by an integer factor D and scales the spectral replicas at 0 and 2&pgr; to produce a signal having a sample frequency of 30 kHz. Accordingly, the integer factor D has a value of two (2).
Asynchronous sample rate conversion can convert between any two input and output sample frequencies. In other words, for asynchronous sample rate conversion, the ratio of the input sample frequency and the output sample frequency may be irrational or the ratio of the input sample frequency and the output sample frequency may be rational but the LCM frequency is too high for synchronous sample rate conversion to be practical. In a typical Prior Art asynchronous sample rate converter such as that described in a publication titled “
Theory and VLSI Architectures for Asynchronous Sample Rate Converters
,” Robert Adams and Tom Kwan, 94th Convention of the Audio Engineering Society, Berlin, Germany, 1993, an input digital signal is first oversampled/interpolated to a very high sample frequency UF
s1
. Next, this high sample frequency signal UF
s1
is filtered by a low-pass filter before being resampled at another high frequency DF
s2
. The high frequency signal is then downsampled by a factor of D to produce the output signal.
For digital audio data transfer, serial data specifications AES3-1992 and IEC-60958 promulgated by the Audio Engineering Society (AES) and the International Electrotechnical Commission (IEC), respectively, are the de facto digital audio interface standards in the industry.
Under the AES3-1992/IEC-60958 format, both audio data and non-audio data (i.e., contained in the U and C channels) are combined in the same data stream. Currently, in the Prior Art there are commercially available transceiver circuits, such as the TDA1315H from Philips™ Semiconductors of the Netherlands, to perform transfers of serial digital audio data that conform to the AES3-1992 and IEC-60958 specifications. Some of these transceiver circuits include a sample rate converter to convert an AES3-1992/IEC-60958 digital audio signal having a first sample frequency to a substantially similar digital signal having a second sample frequency. However, under the Prior Art, only the audio data portion of the AES3-1992/IEC-60958 data stream can be sample rate converted. The U and C non-audio data are generally lost when attempting sample rate conversion on AES3-1992/IEC-60958 data streams.
Thus, a need exists for an apparatus, system, and method to effectively and efficiently perform sample rate conversion of non-audio information contained in AES3-1992/IEC-60958 digital audio data streams.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides an apparatus, system, and method to perform sample rate conversion of non-audio information contained in AES3-1992/IEC-60958 digital audio data streams by utilizing with a sample rate conversion technique for C channel data that are formatted in blocks of a predetermined size. Under the C channel data sample rate conversion technique of the present invention, entire blocks of data are stored in a buffer memory. More particularly, the buffer memory is organized into 3 block-sized pages D-F.
C channel data is first received and then sent to page D of the buffer memory at a rate of 2×F
s1
. When page D is filled with a complete C channel data block, its contents are transferred to page E. Upon transferring its contents to page E, page D begins filling with a new block of data. At the same time, the data block stored in page F is being emptied at a rate of 2×F
s2
. When page F is completely emptied, the contents of page E are transferred to page F. The transfer of data from page F resumes at the beginning of the just-transferred block. In accordance to the present invention, user access to data stored in page E is allowed for data monitoring and modification purposes. Furthermore, the present invention also has an overwrite-protection feature which allowed desired settings to be stored once in page E instead of repeatedly as a result of overwriting by data from page D.
The present invention also meets the above need with a sample rate conversion technique for U channel data. Since there is no universally accepted U format, the present invention provides a choice of three modes. The first U channel data sample rate conversion mode (i.e., the block mode) operates similarly to the C channel data sample rate conversion technique discussed above. The only exception is that the U channel data sample rate conversion does not have the overwrite-protection feature that the C channel data sample rate conversion does.
The second and third U channel data sample rate conversion modes are designed to handle U channel data formatted according to the I
Gaalaas Eric C
Jin Lei
Paulos John
Butler Dennis M.
Cirrus Logic Inc.
Lin Steven
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