Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
1999-03-03
2001-04-17
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S510000, C438S795000, C438S920000
Reexamination Certificate
active
06218270
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device having an impurity diffusion layer, in particular, to a method of manufacturing a semiconductor device having shallow junctions.
2. Description of the Related Art
FIG.
3
A and
FIG. 3B
show an example of prior art ion doping technologies. In this method, ions are directly doped to a substrate with an accelerating voltage of 5 to 80 keV. Thereafter, the substrate is annealed in a nitrogen atmosphere containing oxygen in the state that the front surface thereof is exposed so as to form a diffusion layer.
However, in such known methods, unnecessary impurities other than desired impurities would be doped to the substrate. In addition, when the ion doping process and the annealing process are performed, the front surface of the silicon substrate may be damaged.
To solve such a problem, a silicon oxide film is formed on the substrate. Ions are doped through the silicon oxide film (hereinafter, such an oxide film may be referred to as through-oxide film). This method has been disclosed in for example Japanese Patent Laid-Open Publication No. 58-96763.
FIG. 4A and 4B
show a practical method for forming a through-oxide film. In this method, a silicon oxide film with a thickness of 100 nm or more is formed on the front surface of a substrate. Ions are doped to the substrate through the silicon oxide film at an accelerating voltage of 40 keV. Thereafter, with the silicon oxide film left, the substrate is annealed in a nitrogen atmosphere. Alternatively, after the silicon oxide film is removed and then another silicon oxide film is formed, the substrate is annealed in a nitrogen atmosphere. Thus, a diffusion layer is formed on the substrate. In this method, unnecessary impurities other than desired impurities can be prevented from doped in the substrate.
In the above-described methods, the sheet resistance rises. Intensive studies by the inventor of the present invention show that impurities concentrate in an oxide film. Thus, the concentration of impurities in the diffusion layer decreases. In the silicon oxide film forming method, since doped impurities concentrate in the silicon oxide film, the concentration of impurities of the diffusion layer decreases. Likewise, in the direct ion doping method of which ions are directly doped to a substrate without a silicon oxide film, the substrate is annealed in a nitrogen atmosphere containing several % of oxide so as to prevent the front surface of the substrate from roughening. While the substrate is being annealed, since an oxide film is formed on the front surface of the substrate, impurities concentrate in the oxide film as with the silicon oxide film forming method. Thus, the concentration of the impurities in the diffusion layer decreases. Because of such reasons, in the conventional methods, the sheet resistance increases.
In addition, as semiconductor devices are finely structured, junctions are more shallowly diffused. To do that, it is necessary to lower the accelerating voltage of ions, in reality, 3 keV or less. However, it is difficult to sufficiently shallowly diffuse ions in the method of which ions are doped through the through-oxide film. In addition, the sheet resistance remarkably increases. Table 1 shows the relation between the presence/absence of oxide film and sheet resistance. From the table, it is clear that the doping energy of boron is inversely proportional to the sheet resistance of the through-oxide film.
TABLE 1
Presence/Absence
Absence
Presence
Presence
Absence
of through-oxide
2.5 nm
50 nm
film in ion doping
process
Presence/Absence
Absence
Presence
Presence
Presence
of cover-oxide
(leave
(leave
(deposited
film in annealing
through-
through-
by 100 nm
process
oxide film
oxide film
after
as it is)
as it is)
removal
of - oxide
film)
Annealing
Nitrogen
Nitrogen
Nitrogen
Nitrogen
atmosphere
atmosphere
atmosphere
atmosphere
atmos-
containing
containing
containing
phere
100 ppm or
oxygen (*1)
oxygen
containing
less of
oxygen
oxygen
Boron doping
condition
0.5 keV
63.7
746.9
2373.0
675.3
5 × 1014 cm-2
1 keV
311.5
340.5
464.8
5 × 1014 cm-2
2 keV
232.7
231.7
258.3
5 × 1014 cm-2
5 keV
102.0
99.3
108.9
5 × 1014 cm-2
Values in the table represent average values of sheet resistance values (&OHgr;/□) at 49 points on the wafer.
(*1) “Nitrogen atmosphere containing oxygen” means a nitrogen atmosphere containing 100 ppm or more of oxygen.
In a doping process with ions of boron or ions of a compound thereof, when a silicon substrate is annealed with a silicon oxide film, ions of boron are more deeply diffused. Thus, junctions are more deeply diffused than designed values. Hereinafter, this phenomenon is referred to as “accelerating diffusion”. Recent studies show that the accelerating diffusion takes place as a peculiar phenomenon upon doping of ions of boron or ions of a compound thereof.
An object of the present invention is to solve the above-mentioned problems contained in the prior art.
SUMMARY OF THE INVENTION
A first aspect of the present invention is a method of manufacturing a semiconductor device having a silicon substrate containing an impurity diffusion layer, comprising the steps of doping impurities to the silicon substrate through a silicon oxide film with a thickness of 2.5 nm or less at an accelerating voltage of 3 keV or less, the silicon oxide film being formed on the silicon substrate, and annealing the silicon substrate with the oxide film left.
A second aspect of the present invention is a method of manufacturing a semiconductor device having a silicon substrate containing an impurity diffusion layer, comprising the steps of doping impurities to the silicon substrate through a silicon oxide film with a thickness of 2.5 nm or less at an accelerating voltage of 3 keV or less, the silicon oxide film being formed on the silicon substrate, and removing the oxide film, forming a cover oxide film on the silicon substrate, and annealing the silicon substrate. The cover oxide film is a silicon oxide film that covers the front surface of a substrate that is annealed. The cover oxide film is formed by CVD method or the like. The thickness of the cover oxide film is not limited, but preferably around 100 nm.
A third aspect of the present invention is a method of manufacturing a semiconductor device having a silicon substrate containing an impurity diffusion layer, comprising the steps of doping impurities to the silicon substrate through a silicon oxide film with a thickness of 2.5 nm or less at an accelerating voltage of 3 keV or less, the silicon oxide film being formed on the silicon substrate, removing the oxide film, and annealing the silicon substrate in such a manner that the front surface of the silicon substrate is exposed.
A fourth aspect of the present invention is a method of manufacturing a semiconductor device having a silicon substrate containing an impurity diffusion layer, comprising the steps of directly doping impurities to the silicon substrate at an accelerating voltage of 3 keV or less, and annealing the silicon substrate in such a manner that the front surface of the silicon substrate is exposed.
According to the present invention, since the accelerating voltage is 3 keV or less and the thickness of the silicon oxide film on a silicon substrate to which impurities are doped is 2.5 nm or less, a shallow diffusion layer can be formed. In addition, since the silicon substrate is annealed with the silicon oxide film left or without the silicon oxide film, the thickness of the oxide film (cover oxide film) on the substrate that is annealed becomes 2.5 nm or less. Thus, impurities do not concentrate in the oxide film. Consequently, since the concentration of the impurities does not decrease, the sheet resistance does not decrease.
In addition, since the accelerating energy is 3 keV or less, when the thickness of the through-oxide film is decreased (in particular, when the through-oxide film is not formed), in
Elms Richard
McGinn & Gibb PLLC
NEC Corporation
Pyonin Adam
LandOfFree
Method of manufacturing semiconductor device having shallow... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device having shallow..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device having shallow... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2489557