Methods and apparatus for cleaning semiconductor substrates...

Cleaning and liquid contact with solids – Processes – For metallic – siliceous – or calcareous basework – including...

Reexamination Certificate

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Details

C134S002000, C438S691000, C510S175000, C510S176000

Reexamination Certificate

active

06294027

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to methods and apparatus for processing and cleaning a substrate, and more specifically to methods and apparatus for cleaning semiconductor substrates after polishing of copper films.
2. Back Information
In the manufacture of advanced semiconductor devices, copper (Cu) is beginning to replace aluminum (Al) as the material for metallization. Cu has become desirable due to its lower resistivity and significantly improved electromigration lifetime, when compared to Al.
One process for Cu metallization uses a dual damascene approach. As illustrated in
FIG. 1
a
, a dielectric layer
110
is deposited above a substrate
100
. Dielectric layer
110
may be made up of materials such as silicon dioxide. Vias and/or trenches
120
are then formed in the dielectric layer
110
, as illustrated in
FIG. 1
b
. Vias/trenches
120
may be formed, for example, using dry etching techniques. Next, a thin layer of barrier material (barrier layer)
130
, for example, tantalum (Ta), titanium (Ti), or titanium nitride (TiN) is deposited as illustrated in FIG
1
c
. After barrier layer
130
is deposited the vias/trenches
120
are filled with copper (Cu) layer
140
, as illustrated in
FIG. 1
d
. Copper layer
140
may be deposited using well known deposition techniques such as, for example, chemical vapor deposition (CVD), physical vapor deposition (PVD), or electroplating. In order to isolate the copper interconnects, as illustrated in
FIG. 1
e
, the excess copper layer
140
and barrier layer
130
must be removed.
One method for removing the excess copper layer
140
and barrier layer
130
is polishing the surface of the substrate, for example, polishing using chemical mechanical polishing (CMP). In a CMP process, the semiconductor substrate is polished with a slurry containing abrasive particles, such as alumina particles, and an oxidant, such as hydrogen peroxide. In the CMP process, contaminants are introduced which include particles and/or metal contamination on the copper surface
150
, dielectric surface
160
, and in the dielectric subsurface
165
.
Regardless of how the CMP process is performed, the surface of semiconductor substrate must be cleaned of contaminants. If not removed, these contaminants may affect device performance characteristics and may cause device failure to occur at faster rates than usual. Cleaning the semiconductor substrate after chemical mechanical polishing of copper may be necessary to remove such contaminants from the copper layer and dielectric layers.
One method for cleaning the semiconductor substrate after polishing of the copper layer is brush scrubbing. Brush scrubbing, whether single-sided or double-sided brush scrubbing, is the industry standard for cleaning oxide and tungsten CMP applications. However, there are several problems associated with applying brush scrubbing to post copper CMP cleaning.
One such problem is brush loading. During the CMP process, the top surface of the copper layer may be oxidized and forms copper oxide, for example copper oxide (Cu
2
O or CuO) or copper hydroxide (Cu(OH)
2
). In basic or neutral pH cleaning environments, the copper oxide or copper hydroxide does not dissolve and may be transferred to the brushes, thus loading the brushes. The contaminated (or loaded) brushes may then transfer the copper oxide or copper hydroxide contaminants to subsequently processed substrates during cleaning.
For tungsten and other oxide applications, brush loading could be curtailed by adding a dilute ammunonium hydroxide (NH
4
OH). In the presence of NH
4
OH, part of the copper oxide may form Cu(NH
3
)
2+
complex and may be dissolved; however, due to the high pH environment, the dilute ammonium hydroxide has been found to be insufficient to prevent brush loading of copper oxide. Additionally, it has been found that scrubbing with dilute ammonium hydroxide also causes etching of the copper layer and may cause serious surface roughening.
Brush loading may also occur when alumina particles are used in the copper CMP process. In neutral or inorganic acid (e.g., HCI) cleaning environments, there is an electrostatic attraction between alumina particles and the silicon dioxide surface which makes it difficult to remove the alumina particles from the surface of the dielectric material. Because of the electrostatic attractive force, the alumina particles may also adhere to the brush and cause another brush loading problem with similar effects to those discussed above.
Yet another problem caused by the CMP process is that the surface and subsurface of the dielectric layer may become contaminated during polishing with metal from the copper layer and barrier layer as well as other contaminants from the slurry. During the CMP process, contaminants, especially metal contaminants, may penetrate into the dielectric layer up to approximately 100 angstroms (Å) from the surface. Again, these contaminants may affect device performance characteristics and may cause device failure.
SUMMARY OF THE INVENTION
A cleaning solution, methods and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. In one embodiment, the surface of a semiconductor substrate is cleaned after a copper layer has been polished using a cleaning solution which includes deionized water, an organic compound, and an ammonium compound to create an acidic pH environment.
Additional features and benefits of the present invention will become apparent from the detailed description, figures, and claims set forth below.


REFERENCES:
patent: 5382296 (1995-01-01), Anttila
patent: 5637185 (1997-06-01), Murarka et al.
patent: 5866031 (1999-02-01), Carpio et al.
patent: 5897375 (1999-04-01), Watts et al.
patent: 5954997 (1999-09-01), Kaufman et al.
patent: 5965036 (1999-10-01), Maki et al.
patent: 5981454 (1999-11-01), Small
patent: 6001730 (1999-12-01), Farkas et al.

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