Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-12-04
2001-05-29
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S139000, C257S131000, C257S156000
Reexamination Certificate
active
06239466
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to semiconductor switching devices and, more particularly, to insulated gate bipolar transistors (IGBT's) optimized for zero-voltage switching (ZVS).
Presently available IGBT's are typically of two types, i.e., punch-through (PT) and non-punch-through (NPT). PT IGBT's typically use “lifetime killers” to maximize the trade-off between turn-off time and forward voltage drop. (Lifetime killers are known in the art as comprising external elements which are injected into silicon in order to reduce its lifetime.) NPT IGBT's typically use a thin P
+
collector layer in order to reduce the number of charges injected into the drift layer. PT IGBT's have a buffer layer that acts as a minority carrier injection limiter and allows for a reduction in the thickness of the drift layer. Basically, the buffer layer acts as a barrier to the minority carriers and also allows the electric field in the device to stop at its edge, thereby increasing the voltage/length ratio. Hence, for a given voltage, e.g., 600 V, a PT IGBT with a buffer layer would require approximately 60-80 &mgr;m of silicon to block the voltage, while an NPT IGBT without the buffer layer would require 100-120 &mgr;m of silicon to block the same voltage.
Both PT and NPT IGBT's are optimized for hard-switching operation. However, ZVS (zero-voltage switching, i.e., switching with zero voltage across a device) results in significant operational advantages, particularly in converter applications, over hard-switching at high switching frequencies. Advantages include significantly reduced switching losses, higher switching frequency operation, low electromagnetic interference, lower device voltage and current stresses, better safe operating area, and low-cost thermal management system.
Accordingly, it is desirable to provide an IGBT structure which is optimized for ZVS operation and applications.
BRIEF SUMMARY OF THE INVENTION
An IGBT is optimized for ZVS operation, thereby significantly reducing switching losses during ZVS operation. In effect, the ZVS IGBT is optimized to operate as a MOSFET with a very small bipolar junction transistor (BJT) component. Switching losses are reduced by reducing the number of minority carriers injected into the device during conduction. Additionally, this ZVS IGBT structure allows for a small increase in stored charge as the operating temperature is increased, allowing the device to operate at higher temperatures with relatively low switching losses.
The ZVS IGBT has a very thin P
+
collector layer with a very low emitter efficiency, i.e., ratio of hole current in the base to total emitter current. The doping of the P+ IGBT collector is designed to reduce the forward voltage drop of the IGBT without increasing the total charge stored in its drift layer. A relatively thin buffer layer is included in order to allow a reduction in thickness of the drift layer, also reducing the forward voltage drop. The thickness and doping of the buffer layer are tailored to allow only the number of minority carriers needed for conductivity modulation.
No lifetime killers are provided in the body of the drift layer, but only at the edge of the P+/N− BJT collector interface such that recombination of more minority carriers occurs while the voltage is still low, thereby reducing switching losses. The ZVS IGBT is structured such that, at low temperatures, back injection of holes during turn-off from the P+ collector of the IGBT's PNP bipolar transistor allows some of the minority carriers to be swept out toward the P+ collector of the IGBT, reducing the magnitude of the current tail. The gain of the ZVS IGBT's PNP bipolar transistor is reduced in order to realize the advantages of back injection at higher temperatures. In addition, carefully placed P+ diverters are used to further reduce the number of stored minority carriers stored in the drift layer. Advantageously, at high switching frequencies, the size of a snubber capacitor needed to achieve ZVS with this optimized ZVS IGBT structure is significantly reduced, and moreover, may comprise the device's own parasitic capacitance for some applications.
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Elasser Ahmed
Schutten Michael Joseph
Breedlove Jill M.
General Electric Company
Jackson, Jr. Jerome
Stoner Douglas E.
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