Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead
Reexamination Certificate
1999-09-14
2001-08-14
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
C257S723000, C257S724000, C257S773000, C438S106000, C438S110000, C438S130000
Reexamination Certificate
active
06274931
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to integrated circuit devices, and more particularly to systems and methods for packaging integrated circuit devices.
BACKGROUND OF THE INVENTION
Integrated circuits are widely used in consumer and commercial applications. As the integration density of integrated circuits continues to increase, it may be generally desirable to provide packaging systems and methods for integrated circuit substrates that can provide high density packaging in small volumes. Accordingly, many packaging substrates have been proposed for packaging highly integrated substrates. One such packaging substrate uses a ball grid array, as described in U.S. Pat. No. 5,536,909 to DiStefano et al. entitled Semiconductor Connection Components and Methods With Releasable Lead Support, the disclosure of which is hereby incorporated herein by reference.
In ball grid array technology, a lead frame and package balls are formed in a substrate base film. The substrate base film is then placed adjacent an integrated circuit to be packaged. The substrate base film is then bonded to the integrated circuit.
FIG. 1
is a perspective view of a portion of a substrate base film as described in the above-cited DiStefano et al. patent. As shown in
FIGS. 1 and 2
, lead frames
10
of the substrate base film
1
, corresponding to wires of a plastic package, are electrically connected to corresponding pads
14
on an integrated circuit device, labeled “Chip” in FIG.
2
. The number of pads on the integrated circuit device generally corresponds to the number of the lead frames of the substrate base film
1
. The pads, also referred to as input/output pads, provide output from and receive input to the integrated circuit including data input and output, control input and output, and/or address input and output. The design and fabrication of packaging substrates such as ball grid arrays are well known to those having skill in the art and need not be described further herein.
As is also known to those having skill in the art, integrated circuits may have varying path widths. For example, integrated circuit memory devices typically include an array of memory cells which has a selectable path width. The path width, which reflects the number of input/output channels, also referred to as “DQ” channels, can vary for a given size of memory. Thus, for example, a 16 megabit dynamic RAM (DRAM) array may be configured during manufacture to operate with a 4 bit path width, so that a 4 megabit by 4 DRAM is provided. Alternatively, the 16 megabit DRAM may be configured to operate as a 1 megabit by 16 DRAM, so that a 16 bit wide path is provided.
In one illustrative example, Samsung Electronics Co., Ltd., the assignee of the present invention, markets a family of 16 megabit CMOS DRAMs, as 4 megabit by 4 bit DRAMs and 1 megabit by 16 bit DRAMs. In particular, Model Nos. KM44C4004A, KM44C04104A, KM44V004A and KM44V4104A are marketed as 4 megabit by 4 bit DRAMs. See Samsung Electronics 1995 Databook, Pages 46-47. Models KM416C1004A, KM416C1204A, KM416V1004A and KM416V1204A are marketed as 1 megabit by 16 bit CMOS DRAMs. See Pages 62-63 of the aforesaid 1995 Databook. An integrated circuit memory in which 16 bits of data is simultaneously read from and written to a memory device via 16 DQ channels is referred to as operating in “x16” mode. Similarly, an integrated circuit memory device in which 4 data bits are simultaneously read from and written to a memory device via 4 DQ channels is referred to as operating in “x4” mode.
Integrated circuit memory devices may be designed and manufactured to include both the x16 and the x4 mode in a single integrated circuit. During manufacturing, either x16 mode or x4 mode is selected to produce, for example, a 4 megabit by 4 bit DRAM or a 1 megabit by 16 bit DRAM. Selection of the mode is generally performed by generating permanent selection signals during manufacturing. In particular, an x16 bonding pad and an x4 bonding pad are provided in the integrated circuit. One of the bonding pads is tied to ground or power supply voltage to permanently produce either an x16 or an x4 signal. Integrated circuit memory devices with varying path width are described in U.S. Pat. No. 5,896,395 to Lee entitled Integrated Circuit Memory Devices and Operating Methods Including Temporary Data Path Width Override, assigned to the assignee of the present invention, the disclosure of which is hereby incorporated herein by reference.
When an integrated circuit device has a reduced path width, some of the pads corresponding to the larger path width generally are not used. Moreover, when packaging these devices, lead frames
10
of the substrate base film corresponding to the unused pads generally are not formed on the substrate base film
1
.
Notwithstanding these and other advances, it continues to be desirable to provide integrated circuit packages and packaging methods that can accommodate varying path widths, that can provide high density packages, and that can allow simplified manufacturing.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide integrated circuit packages that can be used with integrated circuit devices having reduced path width.
It is another object of the present invention to provide integrated circuit devices that can be packaged efficiently.
These and other objects may be provided, according to the present invention, by integrated circuit packages that include an integrated circuit substrate including a plurality of microelectronic devices therein and a plurality of pads, wherein first ones of the pads are enabled to provide output data from the microelectronic devices, and wherein second ones of the pads are disabled to provide a reduced path width for the integrated circuit substrate. A packaging substrate includes a plurality of terminals, a respective one of which is connected to a respective one of the pads, including the second ones of the plurality of pads that are disabled to provide a reduced path width for the integrated circuit substrate. Accordingly, the same packaging substrates may be used with integrated circuit substrates having different path widths. Efficient packaging thereby may be provided.
In a preferred embodiment, an integrated circuit substrate includes a control circuit that disables the second ones of the pads to provide a reduced path width for the integrated circuit substrate. The control circuit preferably includes at least one fuse that disables the second ones of pads to provide the reduced path width for the integrated circuit substrate.
The microelectronic devices may comprise a plurality of output circuits, a respective one of which is connected to a respective one of the pads, to provide output data external of the integrated circuit via the plurality of pads. A control circuit disables the output circuits that are connected to the second ones of the plurality of pads, to provide a reduced path width for the integrated circuit devices. The control circuit preferably comprises a pulse generator that generates a pulse from an external clock signal, and a fuse and a switch that are serially connected between first and second reference voltages. The switch is responsive to the pulse when the fuse is open, and the switch is disabled when the fuse is closed. The switch is connected to the output circuits that are connected to the second ones of the pads.
The present invention may be utilized with integrated circuits that include variable path widths. In particular, the present invention may be used with integrated circuit memory devices, including an array of memory cells that are connected to a plurality of output circuits, to provide output data from the array of memory cells to external of the integrated circuit memory device via a plurality of pads, wherein a control circuit disables selected ones of the output circuits to provide a reduced path width output for the integrated circuit memory device.
It also will be understood that the present invention can be used in connection with reduced input pat
Choi Jong-Hyun
Jeon Jun-Young
Malsawma Lex H.
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
Smith Matthew
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