Semiconductor IC with FET and capacitor having side wall spacers

Details Semiconductor IC with FET and capacitor having side wall spacers Semiconductor IC with FET and capacitor having side wall spacers

1997-08-05

1998-10-20

Tsai, Jey

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257306, 257311, H01L 218242

Patent

active

058250581

ABSTRACT:
On the principal surface of an Si semiconductor substrate, a field oxide film is formed defining an active region. On the active region, an insulated gate structure is formed including a gate oxide film and a polycrystalline Si layer. At the same time, a lower capacitor electrode of the polycrystalline Si layer is formed on the field oxide film. The surface of the polycrystalline layer is oxidized to form an insulating film. Another polycrystalline Si layer is deposited covering the insulating film. A mask is formed over the lower capacitor electrode. By using this mask as an etching mask, anisotropic etching is performed to leave an upper capacitor electrode and side wall spacers on the side walls of the gate electrode and lower capacitor electrode.

REFERENCES:
patent: 4367580 (1983-01-01), Guterman
patent: 4419812 (1983-12-01), Topich
patent: 4737838 (1988-04-01), Watanabe
patent: 4753898 (1988-06-01), Parrillo et al.
patent: 5173437 (1992-12-01), Chi
patent: 5218511 (1993-06-01), Nariani
S. Wolf Ph.D., "MOS Devices and NMOS Process Integration", Silicon Processing for The VLSI Era, vol. 2: Process Integration, Lattice Press, Sunset Beach, California, 1990, pp. 354-361.

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