Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-07-28
2001-04-03
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S166000, C438S591000, C438S762000
Reexamination Certificate
active
06210997
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device such as a thin film transistor (TFT) or a thin film diode (TFD), or a thin film integrated circuit (IC) to which TFT or TFD is applied, and in particular, a thin film integrated circuit (IC) for an active-matrix addressed (active matrix) liquid crystal display device, having an insulated gate structure comprising a semiconductor film provided on an insulating substrate such as a glass substrate, or on an insulating coating formed on any type of substrate. The present invention also relates to a process for fabricating the same.
DESCRIPTION OF THE PRIOR ART
Semiconductor devices comprising TFTs on an insulating substrate (such as a glass substrate) developed heretofore include an active matrix-addressed liquid crystal display device using the TFTs for driving the matrices, an image sensor, and a three-dimensional IC.
The TFTs utilized in those devices generally employ a thin film silicon semiconductor. Thin film semiconductors can be roughly classified into two; one is a type comprising amorphous silicon semiconductor (a—Si), and the other is a type comprising crystalline silicon semiconductors. Amorphous silicon semiconductors are most prevailing, because they can be fabricated relatively easily by a vapor phase process at a low temperature, and because they can be readily obtained by mass production. The physical properties thereof, such as electric conductivity, however, are still inferior to those of a crystalline silicon semiconductor. Thus, to implement devices operating at an even higher speed, it has been keenly demanded to establish a process for fabricating TFTs comprising crystalline silicon semiconductors. Known crystalline semiconductors include polycrystalline silicon, microcrystalline silicon, amorphous silicon partly comprising crystalline components, and semiamorphous silicon which exhibits an intermediate state between crystalline silicon and amorphous silicon.
In case of fabricating an insulated gate structure using the silicon films enumerated above, an insulating film having excellent boundary characteristics must be fabricated by any means on the surface of the silicon film. For instance, a gate insulated film can be formed by thermal oxidation if a quartz substrate or any substrate resistant to high temperature is used. However, a quartz substrate is expensive, and is not suitable for large area substrates due to its too high a melting point. Accordingly, the use of other inexpensive glass materials (such as a Corning No. 7059 glass) for the substrate is preferred because of its low melting point and its applicability to mass production. Those lower cost glass substrate materials, however, do not resist to a high temperature process for fabricating a thermal oxidation film. Thus, the insulating film is formed on those inexpensive glass substrates at lower temperatures by means of a physical vapor deposition (PVD) such as sputtering, or a chemical vapor deposition (CVD) such as plasma assisted CVD or photo CVD.
The insulating films formed by PVD or CVD process, however, suffer pinholes and inferior interface characteristics. Thus, the TFTs formed from these films yield problematic low field mobility and low sub-threshold characteristics (the S value), or a large leak current in gate electrode, a severe degradation, and a low production yield. In particular, these characteristics of a gate insulating film has not been found a problem in a TFT using amorphous silicon having low mobility, however, in a TFT using a silicon film having high mobility, the characteristics of the gate insulating film are found more important than those of the silicon film itself.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a means for solving the aforementioned problems, and to provide an oxide film on the semiconductor layer formed on an insulating substrate. In particular, the present invention provides a process for fabricating a gate insulating film as well as a structure of a gate insulating film using a crystalline silicon film for a TFT improved in device characteristics, reliability, and production yield, so long as the conditions do not affect the substrate materials.
Another object of the present invention is to provide, in addition to the active layer of a semiconductor device, a highly crystalline semiconductor layer.
The present invention is characterized in that it comprises forming a thin silicon oxide film on the surface of an island-like crystalline silicon film by irradiating an intense light to the semiconductor material (optically annealing) at a wavelength not influencing the substrate material under an oxidizing atmosphere such as of oxygen, nitrogen oxide, and ozone. Otherwise, the thin silicon oxide film (referred to hereinafter as “thermal oxide film”, inclusive of the silicon oxide film obtained by irradiating an intense light) is formed by thermally annealing the island-like crystalline silicon film at a temperature not influencing the substrate material. In the present invention, the step of forming a thin silicon oxide film is followed by the step of forming a thick silicon oxide film covering the thin silicon oxide film by means of various types of known CVD processes to provide a gate insulating film of a desired thickness.
In particular, the silicon oxide film is obtained by subjecting an organic silane such as tetraethoxysilane (TEOS) as the silicon source together with an oxidizing agent such as oxygen, ozone, or nitrogen oxide, to a CVD process to form silicon oxide. The CVD process specifically refers to a reduced pressure CVD, a normal pressure CVD, a photo CVD, plasma CVD, and a combination thereof.
A silicon oxide film with still stable characteristics can be obtained by forming a silicon oxide film by CVD, and then photo annealing the silicon oxide film again using a visible light or a near infrared light or thermally annealing at a temperature in the range of from 400 to 700° C., under an atmosphere of a gaseous compound of oxygen and nitrogen (e.g., N
2
O), or a mixed gas atmosphere (e.g., a 4:1 mixture of nitrogen and oxygen).
Furthermore, the inventors have discovered that a concentration of electron traps is undesirably high when the silicon oxide film is formed by an organic silane through CVD and the inventor considered that the traps are related to Si—OH bondings. In accordance with another aspect of the invention, the silicon oxide formed from an organic silane is annealed with a nitrogen containing atmosphere, for example, NH
3
, N
2
H
4
, N
2
and N
2
O at a temperature from 400-850° C., thereby, breaking the Si—OH bondings and improving the reliability of the gate insulated structure.
In the process according to the present invention, light is preferably irradiated for a relatively short duration of from about 10 to 1,000 seconds to elevate the surface temperature of the silicon film in the temperature range of from 900 to 1,200° C. The light is irradiated to the silicon film, preferably, at a wavelength absorbed by the silicon film and substantially not absorbed by the substrate. More specifically, a light of a wavelength falling in the range for a near infrared region to the visible light region is preferred, and a light having a wavelength of from 0.5 &mgr;m to 4 &mgr;m (e.g., an infrared light having a peak at a wavelength of 1.3 &mgr;m) is more preferred.
In the present invention described above, the thermal annealing is preferably effected at such a temperature that would not unfavorably influence the substrate as to form warping and shrinking thereon. More specifically, the thermal annealing is effected in the middle temperature range of from 400 to 700° C., and more preferably, in the range of from 500 to 600° C. In general, the thermal annealing is performed at a temperature not higher than the deformation temperature of the substrate, however, the strain energy accumulated inside the substrate can be released to sufficiently reduce the distortion by thermally treating the substrate prior to the thermal annealing
Adachi Hiroki
Fukada Takeshi
Takemura Yasuhiko
Takenouchi Akira
Uehara Hiroshi
Nixon & Peabody LLP
Picardat Kevin M.
Robinson Eric J.
Semiconductor Energy Laboratory Co,. Ltd.
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