Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-05-30
2001-08-28
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S613000, C438S622000, C438S634000
Reexamination Certificate
active
06281111
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application claims the priority of Application No. H09-128176, filed May 19, 1997 in Japan, the subject matter of which is incorporated herein by reference.
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor apparatus and a method for fabricating the same, and more particularly to an electrode structure of a semiconductor integrated circuit and a method for fabricating the same. The invention further relates to a method and a structure for mounting a semiconductor substrate.
BACKGROUND OF THE INVENTION
Conventionally, for mounting process of a semiconductor integrated circuit to a connection substrate, a tape carrier package structure, a chip on board structure and a chip on glass structure have been used. According to those structures, the space between the semiconductor substrate and the connection substrate are filled with a seal resin. For an electrode structure in such a mounting structure, a bump bonding structure using a bump electrode has been used. The bump electrode may be a metal bump electrode, such as a gold (Au) bump electrode, a solder electrode made of an alloy of lead (Pb) and tin (Sn), and the like.
Such a metal bump electrode is deformed plastically, and the alloy of Pb—Sn may be broken from its crystal surface. The difference of the thermal expansion coefficients between the semiconductor substrate and the connection substrate makes some thermal stress in the electrode. Such thermal stress can be also made by the difference of the thermal expansion coefficients between the seal resin and the bump electrode itself. The thermal stress makes thermal fatigue in the electrode, and therefore the electrode may be broken in some cases. The semiconductor integrated circuit is metal-plated, then the metal plate is etched to form the bump electrode. In the semiconductor substrate, a region which is uncovered with a protection layer, such as a trimming circuit, may be seriously affected by the plating process and etching process. Such a conventional electrode structure does not have high enough reliability of electrical connection, because the surface of the semiconductor integrated circuit is not enough protected.
OBJECTS OF THE INVENTION
Accordingly, an object of the invention is to provide a semiconductor apparatus and a method for fabricating the same, in which an electrode has a high reliability of electrical connection.
Another object of the invention is to provide a semiconductor apparatus and a method for fabricating the same, in which the surface of the semiconductor integrated circuit can be protected sufficiently after an electrode is formed.
Additional objects, advantages and novel features of the invention will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
SUMMARY OF THE INVENTION
According to a first aspect of the invention, a semiconductor apparatus includes a semiconductor integrated circuit including a conductive pattern; an insulating layer which is formed on the semiconductor integrated circuit to forms a plurality of base members having uneven heights; an opening which is formed through the insulating layer to expose a part of the conductive pattern; and a conductive layer which is formed on the insulating layer and the opening, the conductive layer is extending from the exposed portion of the conductive pattern to the top surface of the highest base member. An electrode is composed of the insulating layer, the opening and the conductive layer.
According to a second aspect of the invention, a semiconductor apparatus includes a semiconductor substrate including a semiconductor integrated circuit, and an electrode, which is composed of a base member of insulating material formed on the semiconductor integrated circuit and a conductive layer formed on the surface of the base member; a connection substrate on which the semiconductor substrate is mounted with a face-down technique; and a seal member which is filled in the space between the semiconductor substrate and the connection substrate. The base member and the seal member are made of the same material.
According to a third aspect of the invention, in a method for fabricating a semiconductor apparatus, an insulating layer is formed on a semiconductor integrated circuit. Then, an opening is formed through the insulating layer to expose a part of a conductive pattern. A conductive layer is formed over the insulating layer with the opening; the conductive layer is patterned except a portion extending from the exposed part of the conductive pattern to a predetermined portion of the insulating layer; and the insulating layer is shaped at the portion uncovered with the conductive layer to have a height lower than the portion covered with the conductive layer.
According to a fourth aspect of the invention, in a method for fabricating a semiconductor apparatus, a semiconductor substrate is fabricated to include a semiconductor integrated circuit, and an electrode, which is composed of a base member of insulating material formed on the semiconductor integrated circuit and a conductive layer formed on the surface of the base member. The semiconductor substrate is placed to be face-down to a connection substrate; then the electrode is connected to the connection substrate. Nest, a seal member is filled in the space between the semiconductor substrate and the connection substrate. The base member and the seal member are made of the same material.
According to the first and third aspects of the invention, the semiconductor integrated circuit is protected by the base members. Further, the electrode is prevented from being broken due to a thermal stress and thermal fatigue, because the electrode to be connected to another substrate is formed on the top surface of the highest (tallest) base member. As a result, the semiconductor apparatus can be fabricated to have a high reliability.
According to the second and fourth aspects of the invention, the space between the semiconductor substrate and the connection substrate is filled with the seal member that is made of the same material of the base member, so that the base member and the seal member have the same thermal expansion coefficient. As a result, the electrode is prevented from being broken due to a thermal stress and thermal fatigue, and therefore, the semiconductor apparatus can be fabricated to have a high reliability.
REFERENCES:
patent: 4654113 (1987-03-01), Tuchiya et al.
patent: 5382544 (1995-01-01), Matsumoto et al.
patent: 6051489 (2000-04-01), Young et al.
patent: 6136624 (2000-10-01), Kemmochi et al.
Jones Volentine, P.L.L.C
Lee Eddie
OKI Electric Industry Co., Ltd.
Richards N. Drew
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