Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
1998-06-19
2001-08-21
Etienne, Ario (Department: 2155)
Electrical computers and digital data processing systems: input/
Access arbitrating
C710S036000, C711S150000
Reexamination Certificate
active
06279066
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the sharing of common resources. More particularly, it relates to the simplification of the arbitration between a plurality of accessing processing agents for access to a common resource such as a register or memory location.
2. Background of Related Art
A multi-processor system typically has a plurality of microprocessors, digital signal processors (DSPs), microcontrollers and/or other processing agents running a synchronously with respect to one another. For various purposes, e.g., to conserve resources and/or to communicate information between processors, multi-processor systems often share access to one or more common resources.
Typically, only one processing agent may access the common resources at any one time. Thus, access to the shared resources must be coordinated such that only one processing agent at a time accesses the common resource. This coordination among the multiple processing agents for access to shared resources is referred to generally as arbitration.
Cumbersome techniques are conventionally implemented to arbitrate for one-at-a time access to the shared resource. For instance, in one conventional technique, individual arbitration logic is required for each of the shared resources (e.g., for each control register) to resolve write contention from the plurality of processors. However, this technique can become prohibitively expensive to implement, particularly when the number of shared resources each requiring its own arbitration logic is large.
Access to a shared resource may alternatively be arbitrated using a software semaphore technique, i.e., using software flags. In this technique, one of the processing agents is designated and placed in charge of allocating write and/or read access to the shared resources, referred to herein as an Allocator Processor. Then, any processor attempting to access that shared resource must first arbitrate for permission through a request to the designated Allocator Processor. The Allocator Processor is responsible for determining that no other processor is already accessing the shared resource or has a pending request for accessing the shared resource with a higher priority than that of the currently requesting processor. Upon determination that the shared resource is free, the Allocator Processor grants permission to the requesting processor to access the shared resource. After granting access to a winning agent, the Allocator Processor blocks write and/or read attempts by other processors to the same shared resource until the current process is completed. Thereafter, upon completion of its use of the shared resource, the accessing processor typically must again communicate with the Allocator Processor to signal that it is finished using the shared resource so that access may be granted to the next requesting processor. Thus, in this conventional software based technique, any processor desirous of accessing a shared resource must first request and be granted permission by a designated processor before being allowed to access that shared resource. However, complicated and time consuming communications between the requesting processor(s) and the Allocator Processor can result in prohibitive service delays, slowing down the performance of the entire multi-processor system.
There is thus a need for a simple arbitration technique which streamlines access by a plurality of processors to shared resources, e.g., control registers, without the need for elaborate arbitration logic implemented for each shared resource, and without requiring numerous transmissions between processors and a controlling processor before the shared resource can be accessed.
SUMMARY OF THE INVENTION
In accordance with the principles of the present invention, a shared resource negotiator comprises an access register, the access register including a plurality of write bits each corresponding to one of a plurality of processor's request to access a shared resource, and a plurality of read bits corresponding to a grant status to access the shared resource.
In accordance with another aspect of the present invention, a shared resource negotiator comprises a plurality of request bits. A plurality of grant bits corresponds respectively to the plurality of request bits. Arbitration logic is adapted and arranged to permit only one of the plurality of grant bits to become active at any one time.
A method of negotiating access to a shared resource in accordance with the principles of the present invention comprises storing an access request signal in a first bit in a register including at least two bits. A bit signal is output corresponding to a grant status with respect to the access request based on a status of at least one other bit in the register. The grant status is an access granted signal if the at least one other bit in the register is an access denied signal, and the grant status is an access denied signal if the at least one other bit in the register is an access granted signal.
Another method of negotiating access to a shared resource in accordance with the present invention comprises writing a first logic level to a specific bit in a register, and reading an output corresponding to the specific bit. The shared resource is accessed when the output indicates that access has been granted, and the specific bit in the register is cleared.
REFERENCES:
patent: 5339443 (1994-08-01), Lockwood
patent: 5577229 (1996-11-01), Wakerly
patent: 5956337 (1999-09-01), Michael
patent: 6023727 (2000-02-01), Barrett et al.
Agere Systems Guardian Corp.
Bollman William H.
Etienne Ario
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