Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Reexamination Certificate
1997-03-07
2001-07-10
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
C710S022000, C710S026000
Reexamination Certificate
active
06260101
ABSTRACT:
BACKGROUND OF THE INVENTION
2. Field of the Invention
This invention relates to the manufacture of integrated circuits and more particularly to the manufacture of microcontrollers.
3. Description of the Relevant Art
A microcontroller is an integrated circuit which incorporates a microprocessor core along with one or more support circuits on the same monolithic semiconductor substrate (i.e., chip). A typical computer system includes a microprocessor secured within its own semiconductor device package and connected to several separately-packaged support circuits. The support circuits perform support functions such as communication functions and memory interface functions. Computer systems which employ microcontrollers may thus be formed using fewer semiconductor devices. Advantages of such systems include lower fabrication costs and higher reliabilities. Microcontrollers find applications in industrial and commercial products including control systems, computer terminals, hand-held communications devices (e.g., cellular telephones), photocopier machines, facsimile machines, and hard disk drives.
A microcontroller is typically coupled to one or more external memory devices which store software programs consisting of instructions and data. During operation, the microcontroller fetches the instructions and data from the external memory devices and operates upon the data during instruction execution. The microprocessor core of the microcontroller typically includes an execution unit coupled to a bus interface unit (BIU). The BIU generates multiple address and control signals used to fetch the instructions and data from the external memory devices, and the execution unit executes those instructions. Each unique combination of the address signals generated by the BIU allows access to a different memory location within the external memory devices. For example, if the BIU generates n address signals, the microcontroller may access 2
n
unique memory locations.
Due to the widespread acceptance of the x86 microprocessor architecture, many microcontrollers include execution units which execute x86 instructions. While newer microcontrollers incorporate an increased number of support circuits, their execution units remain virtually unchanged in order to maintain backwards compatibility with the vast amount of existing software developed for previous microcontroller products.
There are two basic types of software programs: operating system programs and application programs. An operating system is a collection of software programs which provide file management, input/output control, and a controlled environment for executions of applications programs. MS-DOS® and Windows NT™ (Microsoft Corp.) are common operating systems. An application program is a computer program which performs a specific function, and is typically designed to operate within the controlled environment created by an operating system.
Early x86 microprocessors generate 20 address signals A
0
-A
19
. The simultaneous values of the address signals A
0
-A
19
define an address, where A
0
is the least significant bit of the binary value of the address and A
19
is the most significant bit of the binary value of the address. The 20-bit addresses are generated from a 16-bit “segment” portion and a 16-bit “offset” portion. The segment portion is first shifted four bit positions to the left, then the offset portion is added to the shifted segment portion to form the 20-bit address. With 20 address lines, early x86 microprocessors could generate 2
20
(i.e., 1,048,576) unique combinations of address signals and access 2
20
unique memory locations (i.e., 1,048,576 8-bit bytes of memory, or 1 Mbyte of memory). Newer x86 microprocessors still retain this address generation capability in order to maintain software compatibility. The segment portion is stored in one of several dedicated segment registers which software instructions may read and write. The offset portion is typically generated by the execution unit during instruction execution. Microcontrollers based upon the x86 architecture employ this shift-and-add technique to generate 20-bit addresses. The BIU of such microcontrollers typically has special hardware to perform the shift-and-add address generation operation.
The memory address space of a microcontroller generating n address signals extends over 2
n
consecutive memory locations from memory location 0 to memory location 2
n
−1. For example, the memory address space of a microcontroller having 20 address lines extends from memory location 0 (00000h) to 2
20
−1 (i.e., 1,048,575 or FFFFFh). The x86 architecture places certain restrictions upon the contents of memory locations within the memory address space. The x86 architecture reserves portions of the memory address space having the highest and lowest address values for operating system software. A first portion of the memory address having the highest address values (i.e., the uppermost portion of the memory address space) is reserved for software instructions executed following assertion of a RESET signal, system configuration data, and interrupt service routines executed following the reception of interrupt signals. A second portion the memory address space having the lowest address values (i.e., the lowermost portion of the memory address space) is also reserved for operating system software. The first 1,024 bytes of the memory address space (i.e., memory locations 0 through 1,023 or 003FFh) are reserved for an interrupt vector table including 256 4-byte addresses of the entry points of the interrupt service routines corresponding to received interrupt numbers.
Due to the requirement to reserve the uppermost and lowermost portions of the memory address space, microcontrollers employing the x86 architecture typically include a chip select unit (CSU) which generates separate chip select signals for the uppermost and lowermost portions of the memory address space. The CSU typically also generates one or more chip select signals for a middle portion of the memory address space existing between the uppermost and lowermost portions. Only one chip select signal is asserted at any given time, and only memory devices receiving an asserted chip select signal are enabled for the memory access operation in progress. A first non-volatile memory device (e.g., a ROM or a Flash device) typically contains the portion of the operating system software residing in the uppermost portion of the memory address space and receives the corresponding chip select signal. A second volatile memory device (e.g., a RAM device) typically contains the portion of the operating system software allocated to the lowermost portion of the memory address space and receives the corresponding chip select signal. Additional memory devices may contain application programs, and each additional memory device receives a chip select signal designated for the remaining middle portion of the memory address space.
For example, an x86-based microcontroller may be coupled to three different memory devices: a first 256K×8 Flash memory device, a second 256K×8 static random access memory (SRAM) device, and a third 512K×8 SRAM memory device. The first memory device has 18 address signal terminals MA
0
-MA
17
and contains the portion of the operating system software residing in the uppermost portion of the memory address space. Terminals MA
0
-MA
17
of the first memory device are connected to address signal terminals A
0
-A
17
of the microcontroller, and the first memory device is enabled by a programmed upper chip select signal (UCS#). Chip select signal UCS# is an active low signal as denoted by the ‘#’ symbol following the signal name ‘UCS’. Active low signals are asserted when driven to a low logic level and deasserted when driven to a logic high level. The second memory device also has 18 address signal terminals MA
0
-MA
17
, and contains the portion of the operating system software residing in the lowermost portion of the memory address space. Terminals MA
0
-MA
17
of the
Hansen John P.
Huff Ronald M.
Advanced Micro Devices , Inc.
Anderson Matt
Conley Rose & Tayon PC
Kim Matthew
LandOfFree
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