Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-09-17
2001-04-24
Pham, Long (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S534000
Reexamination Certificate
active
06222222
ABSTRACT:
TECHNICAL FIELD
This invention relates to capacitor constructions and to methods for forming capacitors.
BACKGROUND OF THE INVENTION
As semiconductor devices get smaller in size, designers are faced with problems associated with the production of capacitors which are small enough to meet design criteria, yet maintain sufficient capacitance in spite of the smaller size.
One type of capacitor is the container capacitor which is so named for its container-like appearance. Heretofore designers of semiconductor devices, and in particular container capacitors, have focused their attention on increasing the surface area of the inner capacitor plate by means of depositing polysilicon which has a rough surface texture on the inside of the containers. Hemispherical grain polysilicon (HSG) is often utilized for this purpose. This increase in surface area of the inner capacitor plate translates into increased capacitance.
While the use of the technique, such as described above, has worked with some degree of success, there are several aspects of this same and other techniques which have detracted from their usefulness. For example, as contact openings become smaller in size, the use of materials such as HSG polysilicon becomes less attractive because the rough outer surface of such materials facilitates plugging or otherwise occluding smaller contact openings. Accordingly, it becomes necessary to reduce the grain size or roughness of the HSG which, in turn, reduces the area enhancement factor of the film.
One type of integrated circuitry which utilizes capacitors is memory, such as dynamic random access memory (DRAM) circuitry. As DRAMs increase in memory cell density, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area. The principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors.
This invention arose out of concerns associated with providing integrated circuitry device capacitors having sufficiently high storage capacitance despite decreasing device dimensions. This invention also arose out of concerns associated with providing memory circuitry, and in particular DRAM circuitry, with capacitors having sufficiently high storage capacitance despite decreasing cell area.
SUMMARY OF THE INVENTION
Capacitor constructions and methods of forming the same are described. In one implementation, a capacitor container is formed over a substrate and includes an internal surface and an external surface. At least some of the external surface is provided to be rougher than at least some of the internal container surface. A capacitor dielectric layer and an outer capacitor plate layer are formed over at least portions of the internal and the external surfaces of the capacitor container. In another implementation, a layer comprising roughened polysilicon is formed over at least some of the external container surface but not over any of the internal container surface. In a preferred aspect, the roughened external surface or roughened polysilicon comprises hemispherical grain polysilicon.
REFERENCES:
patent: 5389568 (1995-02-01), Yun
patent: 5418180 (1995-05-01), Brown
patent: 5447878 (1995-09-01), Park et al.
patent: 5554557 (1996-09-01), Koh
patent: 5792689 (1998-08-01), Yang et al.
DeBoer Scott J.
Schuegraf Klaus F.
Thakur Randhir P. S.
Coleman William David
Micro)n Technology, Inc.
Pham Long
Wells St. John Roberts Gregory & Matkin
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