Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate
2000-02-04
2001-08-28
Lane, Jack A (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Slip control, misaligning, boundary alignment
C711S165000
Reexamination Certificate
active
06282623
ABSTRACT:
FIELD OF INVENTION
This invention relates generally to a field of digital signal processing, and more particularly to digital signal processing operations requiring memory access to consecutive data words.
BACKGROUND OF THE INVENTION
In the digital signal processing technology typically one or more analog signals which are representative of some real physical property are filtered or undergo some other kind of arithmetic evaluation or transformation. For this purpose, it is necessary to sample the incoming analog signals. For each analog signal this results in a continuous stream of digital samples. Furthermore, it is known in the art to store such separate sequences of digital samples separately from each other in different memories or in the same memory but separated address spaces. An example for micro processors which incorporate these principles is the DSP 56300 family of 24-bit digital signal processors which are commercially available from Motorola, Inc.
Digital signal processors are applied in virtually all fields of technology and apparatuses. One application is to replace the functionality of an analog device, such as an analog filter, by a digital filter which allows for an enhanced quality and more compact design. Other fields are for digital audio devices, such as compact disc players or digital audio tapes, as well as communication devices, such as mobile telephones or radios. Such applications typically require a high processor throughput, either because of the high band width of the sample's analog signal or because of the complexity of the digital transformations to be carried out on the sampled signal or a combination of both.
A need therefore exists to increase the performance of digital signal processors.
SUMMARY OF THE INVENTION
The underlying problem of the invention is substantially met by applying the features laid down in the independent claims. Preferred embodiments are given in the dependent claims.
The invention is advantageous in that it allows to significantly improve the processing performance of a digital signal processor by adding only minimal hardware.
According to a preferred embodiment of the invention, four data accesses can be carried out in a single processing cycle. The corresponding data sequences can be processed in a finite impulse response type processing step which typically involves data processing in multiply-accumulate loops. Preferably two multiplication units are used, each of which can multiply two of the data words provided in each cycle. The results of the two multiplications is added and accumulated.
If the architecture of a digital signal processor designed in accordance with the principles of the invention is pipelined, this allows two multiply-accumulate operations in one cycle without increasing the clock frequency. As a consequence, such a digital signal processor is also advantageous with respect to power dissipation. This is particularly beneficial for battery powered applications, since the minimized power dissipation of the digital signal processor allows longer intervals between recharging the battery.
Furthermore, it is particularly advantageous that only a single address generation unit is required even though at least two data words can be accessed from each memory device or address region in a memory device. Thus, by using only a single address generation unit, up to four data words can be accessed in a single cycle.
REFERENCES:
patent: 4609996 (1986-09-01), Kummer
patent: 5805877 (1998-09-01), Black et al.
Motorola Semiconductor Technical Data, Advance Information DSP56301, p. 01, Motorola Inc., 1995.
Halahmi Dror
Salant Yoram
Chiu Joanna G.
Lane Jack A
Motorola Inc.
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