Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2000-01-06
2001-01-23
Fears, Terrell W. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S210130, C365S230010
Reexamination Certificate
active
06178125
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly to semiconductor memory devices with redundant circuits (spare circuits) having circuit structures allowing a device with a defect to be repaired through use of a spare memory cell in place of a defective memory cell.
2. Description of the Background Art
In the semiconductor memory device with the redundant circuit, when the device is found to be defective, the device can be repaired to work as a good device through the use of a redundant circuit (hereinafter referred to as a spare) formed as a spare circuit in place of a memory cell column or a memory cell row having a defective bit in the semiconductor memory device.
Generally, the redundant circuit is formed to take effect only on a defective memory cell column and a defective memory cell row that needs repair through the use of an apparatus (hereinafter referred to as a laser trimmer) for blowing a fine wiring. The laser trimmer generates a laser light beam, and a plurality of wirings (hereinafter referred to as a fuse) in the redundant circuit that can be blown are selectively irradiated with the laser light beam and cut off. This method will hereinafter be referred to as laser trimming method.
A defective memory cell column or a defective memory cell row can be repaired but by the laser trimmer. One of available methods is a method of electrically heating and blowing a fuse which is a resistive element through application of a high voltage on the fuse from an external source. This method will hereinafter be referred to as electric fuse method and the fuse employed in this method will be called an electric fuse. According to the electric fuse method, the electric fuse can be blown through the application of a high voltage from an external source even after the packaging of the semiconductor device, whereby a final product yield can be increased. In the case of the laser trimming method, the device cannot be repaired after the packaging because it is impossible to apply a laser light beam on a fuse already in the package.
FIG. 13
is a block diagram showing an internal structure of a conventional semiconductor memory device having a redundant circuit and particularly is referred to for describing how a spare is selected.
It is well known that a memory cell column or a memory cell row having a defective bit in a semiconductor memory device can be located, in other words, an address of the defective bit can be determined through a test of the semiconductor memory device including the redundant circuit by an external testing device (such as a tester).
With reference to
FIG. 13
, the conventional semiconductor memory device includes main memory cells
352
, a main address decoder
350
for receiving and decoding an address signal AD and selecting a memory cell having an address corresponding to the decoded signal from main memory cells
352
, a fuse select circuit
344
receiving and decoding a fuse select address signal BSEL when a defective memory cell is to be repaired and receiving an address strobe signal /AS in a normal operation to supply a fuse select signal BSIG as an output, a redundant circuit program fuse
346
receiving address signal AD and fuse select signal BSIG and supplying a spare select signal SPSEL as an output, a decoder inactivating circuit
348
receiving the spare select signal and inactivating main address decoder
350
, a spare address decoder
354
receiving and decoding the spare select signal, and, spare memory cells
356
activated in a portion corresponding to the spare select signal decoded by the spare address decoder.
When the device is repaired by allocating an address of a defective memory cell to a spare memory cell
356
, the repair can be achieved by storing (programming) address information corresponding to the defective bit in redundant circuit program fuse
346
. To store the address information corresponding to the defective bit, a plurality of fuses formed of a material of wiring such as aluminum and polycrystalline silicon are selectively blown by a laser light beam in the case of the laser trimming method or by the application of a high voltage on the ends of fuse in the case of the electric fuse method.
When a main memory cell
352
in the semiconductor memory device is to be accessed from an external source, address signal AD is applied from the external source and a desired main memory cell column or a main memory cell row is accessed via main address decoder
350
.
On the other hand, if a main memory cell
352
is found to have a defect and a spare memory cell
356
needs to be employed in the place thereof, information corresponding to an address of the defective memory cell is stored in redundant circuit program fuse
346
. On the input of an address from the external source, an address corresponding to information stored in redundant circuit program fuse
346
and the input address are compared. When two addresses are found to match as the result of comparison, it is determined that the use of a spare is requested, and redundant circuit program fuse
346
supplies spare select signal SPSEL as an output.
When selection of a spare is requested and spare select signal SPSEL is supplied as an output, decoder inactivating circuit
348
supplies an inactivation signal to main address decoder
350
and inactivating main address decoder
350
to prevent access to main memory cell
352
.
Spare select signal SPSEL is decoded by spare address decoder
354
. Based on the result of decoding, a spare memory cell
356
is selected.
Thus, the spare can be employed when a particular address (address of a cell to be repaired: also referred to as substitution address) is input.
Next, a process of selecting a spare line among a plurality of spare lines and a process of storing a substitution address will be described.
FIG. 14
is a simplified block diagram referenced for describing the process of selecting a spare.
In
FIG. 14
, for the simplicity of the description, an address space of main memory cells
356
is assumed to be two bits, in other words, four addresses exists, and spare lines of two bits, that is, four spare lines are employed. As there is four spare lines, four spare select signals SPSEL
0
-SPSEL
3
are employed and correspond to spare memory cells
360
,
361
,
362
and
363
, respectively. For example, when spare memory cell
362
is to be selected, spare select signal SPSEL
2
is activated.
To designate a memory cell to be connected among four spare memory cell
360
-
363
, fuse select address signal BSEL is employed. Fuse select address signal BSEL is generated in the semiconductor memory device or in a source external to the semiconductor memory device. As there is four spares in this case, fuse select address signal BSEL includes two 2-bit signals BSEL
0
and BSEL
1
.
Fuse select address signal BSEL is decoded by fuse select decoder
344
to fuse select signal BSIG corresponding to a spare memory cell. Fuse select signal BSIG includes four signal bits BSIG
0
, BSIG
1
, BSIG
2
and BSIG
3
. When a first substitution address is to be stored, BSIG
0
is applied to redundant circuit program fuse
346
. When a second substitution address is to be stored, when a third substitution address is to be stored and when a forth substitution address is to be stored, BSIG
1
, BSIG
2
and BSIG
3
are applied to redundant circuit program fuse
346
, respectively. Hence, when a firs substitution address is selected, the content of the fuse select address signal is BSEL
0
=0, BSEL
1
=0 and fuse select signal BSIG
0
=H and fuse select signalsBSIGI-BSIG
3
are at an L level.
In some cases, it is desirable to repair a defective bit through the use of an unused spare when a defective bit is produced after the repair process, for example, in a process after the packaging. In the conventional semiconductor memory device with the redundant circuit employing the electric fuse method, if the information of use of a spare in the redundant circuit
Fears Terrell W.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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