Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
1998-07-06
2001-05-22
Kim, Kenneth S. (Department: 2783)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
C711S141000, C711S147000
Reexamination Certificate
active
06237083
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention is related to the field of microprocessors and, more particularly, to microprocessors having multiple register files which map to the same logical storage.
2. Description of the Related Art
Microprocessors are often configured to operate upon a variety of data types in order to provide computational solutions to a wide range of problems. For example, integer and floating point data types are common. The integer data type may be used in the case where the values to be operated upon are of approximately the same magnitude (as well as any intermediate results calculated in order to produce the results of interest). On the other hand, if the magnitudes of the values to be operated upon (or the intermediate results) are expected to vary widely, then the floating point data type may be more appropriate. It is noted that, as used herein, the terms “floating point data type”, “floating point register”, and “floating point instruction” refer to operation upon floating point operands according to IEEE standard 754/854 floating point arithmetic. For example, the x87 instructions defined by Intel Corporation are floating point instructions.
The data type used by each instruction within the instruction set is typically predefined as part of the instruction definition. For example, integer instructions are instructions which are defined to operate upon the integer data type. Similarly, floating point instructions are defined to operate upon the floating point data type. Generally, an instruction is the most basic operation which the programmer can specify in order to direct the microprocessor to perform a desired function. By arranging instructions in a particular order, the programmer may accomplish a specific objective. Instructions may be grouped with other instructions to form different instruction types according to the data type upon which they are defined to operate. Typically, an instruction is defined to receive one or more operands upon which to perform an operation (the “source operands”) and is defined to store the result (the “destination operand”). The term “instruction set”, as used herein, refers to a group of instructions defined via a particular processor architecture. Each instruction is assigned a unique encoding which identifies that instruction unambiguously from other instructions within the instruction set.
As advances in semiconductor fabrication processes have been developed, it has become possible to increase the number of transistors which can be included upon a single chip and to increase the operating frequencies of the chips. Accordingly, microprocessors have been able to increase performance through increased operating frequencies (i.e. shorter clock cycles) as well as through advanced microarchitectures made possible by the increase in available transistors.
One way to take advantage of the increase in available transistors is to add new data types to the microprocessor. The new data types may be specifically designed with a particular task in mind. The data type, and the instructions defined to operate upon the data type, may be optimized for the particular task. For example, the x86 instruction set has recently been expanded in this fashion. While previous microprocessors which implement the x86 instruction set (e.g. the 80486 from Intel Corporation and the 5
K
86 from Advanced Micro Devices, Inc.) generally execute instructions specifying the floating point and integer data types, the most recent microprocessor implementations also execute instructions specifying the MMX data type. The MMX data type is a 64 bit operand treated as a set of packed integers. The packed integers may be eight 8 bit integers, four 16 bit integers, or two 32 bit integers. Even more recently, a packed floating point operand has been added for additional multimedia computation capabilities. The packed floating point operand may comprise, for example, two packed 32-bit floating point values within the 64 bit operand. However, the packed floating point operands may not be entirely IEEE 754 compatible. Together, the MMX data type and the packed floating point data type may be referred to herein as a multimedia data type. Other data formats may be included in the multimedia data type as well.
The multimedia data type and instructions which use the data type are optimized for video, graphics, and audio data manipulations. Audio, graphics, and/or video manipulation is referred to herein as “multimedia manipulation”. These types of operations have become more important as computer systems have employed more advanced graphical user interfaces via the operating systems and application programs installed thereon. Additionally, the audio capabilities of computer systems have been enhanced. More particularly, the multimedia data type allows for the same operation to be performed upon each of the values within the packed operand (i.e. a single instruction, multiple data (SIMD) implementation). By employing the SIMD operations, fewer instructions may be employed to perform the desired manipulations then would have otherwise been required (since one instruction may concurrently operate upon multiple values). For many video, graphics, and/or audio computing tasks, the same operation is applied to a large number of data elements arranged for display or playback, and therefore instructions which perform the same operation upon multiple data elements may be advantageous.
In order to minimize the impact upon operating systems designed for the x86 architecture prior to the addition of the multimedia data type and instructions, the registers defined to store the multimedia operands are defined to be shared with the x87 floating point registers (i.e. the registers defined to store IEEE 754/854 compliant floating point operands). In other words, the multimedia registers are architecturally defined to use the same logical storage locations as the x87 floating point registers. In this manner, no new state is added to the microprocessor. If new state were added to the microprocessor, the operating system software would require change. More particularly, the portion of the operating system responsible for context switching would require changes to save and restore the new state. Due to the sharing of logical storage between x87 floating point registers and multimedia registers, operating systems which do not recognize multimedia instructions may still operate properly (particularly with respect to context save and restore operations). Since these operating systems were already handling the floating point registers, the multimedia registers are automatically handled.
It is noted that the multimedia registers may store packed floating point operands. However, these floating point operands differ from the x87 floating point operands in a number of ways. For example, the x87 floating point operand is a single 80 bit extended precision value occupying the x87 floating point register, while the packed floating point operands may be a pair of 32 bit single precision values occupying the corresponding multimedia register. Furthermore, different instructions within the instruction set are defined to access the x87 floating point registers than the instructions defined to access the multimedia registers. Additionally, the x87 floating point registers are operated in a stack-oriented fashion by the x87 floating point instructions, while the multimedia registers are accessed as individual registers by the multimedia instructions.
The sharing of registers between data types may be advantageous for operating system compatibility (particularly the context save/restore portion of the operating system, as described above), but creates additional hardware problems for microprocessors supporting the new data type and instructions. While it is generally illogical to store a value of one data type in a shared register and then use the shared register as a source operand for an instruction operating upon a different data type, it is desirable to provide defined
Advanced Micro Devices , Inc.
Conley Rose & Tayon PC
Kim Kenneth S.
Merkel Lawrence J.
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