Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-05-24
2001-04-17
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S356000, C257S357000, C257S360000
Reexamination Certificate
active
06218705
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having a MOS transistor designed to prevent damage to the insulating film of a gate electrode in a plasma process and the like.
2. Description of the Prior Art
Conventionally, many plasma processes are used in a semiconductor device manufacturing process. In a plasma process, a voltage is applied to an electrode. This damages a gate insulating film of a MOS device, and results in a decrease in the yield of LSIs or a deterioration in reliability. This problem will be described below by taking a transistor for checking/measuring device characteristics as an example.
FIG. 1
is a plan view of a measurement transistor. A measurement transistor has a diffusion region formed in that region on a P-type substrate
1
, which is surrounded by a field insulating film
2
. A gate electrode
5
is formed across this diffusion region. Regions adjacent to the gate electrode
5
in the diffusion region serve as heavily-doped N-type diffusion regions
3
A and
3
B. Probe pads
7
A,
7
B, and
7
C are respectively connected to contacts
6
formed on the gate electrode
5
and the heavily-doped N-type diffusion regions
3
A and
3
B.
The pads
7
A,
7
B, and
7
C are respectively used for gate, source, and drain electrodes. During plasma etching of the pad electrode, charge flows into the gate electrode
5
through each pad, resulting in a deterioration in the gate insulating film. Since the area of each pad is relatively large with the length of one side ranging from 50 &mgr;m to 100 &mgr;m, damage caused by the plasma cannot be neglected.
As shown in
FIG. 2
, a protective diode D may be formed to prevent charge buildup on the gate electrode
5
through the pad
7
A. Referring to
FIG. 2
, the pad
7
A for the gate electrode is connected to a heavily-doped N-type diffusion region
3
D through an interconnection
9
D. Since the P-type substrate
1
is located below the heavily-doped N-type diffusion region, the gate pad
7
A is connected to the heavily-doped N/P-type diode D. As a consequence, the charge built up on the gate electrode
5
can be released to the P-type substrate
1
.
A structure in which the diode or transistor of an input/output protective circuit is made of polysilicon is disclosed in Japanese Unexamined Patent Publication No. 1-253276.
As the size of the semiconductor device decreases, however, the thickness of the gate insulating film is reduced, and the breakdown voltage of the gate insulating film gradually decreases. On the other hand, the breakdown voltage of the protective diode hardly changes because the voltage is determined by the impurity concentrations of the diffusion region and its adjacent well. For this reason, when the thickness of the gate insulating film becomes about 8 nm or less, the breakdown voltage of the protective diode becomes higher than that of the gate insulating film. The diode having the conventional structure cannot therefore provide sufficient protection.
This state will be described below with reference to FIG.
3
.
FIG. 3
shows the relationship between “gate voltage” and “gate current” and the characteristics of a diode when a thick gate insulating film is formed. Referring to
FIG. 3
, the abscissa represents the gate voltage with reference to the substrate voltage. A current flowing in the gate insulating film is tunneling current and abruptly increases at a given voltage or higher. Upon application of a positive voltage, the diode is reverse-biased. Hence, a breakdown occurs at a given voltage, and the current flowing in the diode abruptly increases. In a plasma process, plasma light generates carriers in the substrate. As a result, a leakage current that does not have much dependence on voltage flows. This behavior is expressed as diode characteristic in FIG.
3
.
Assume that Vbd (thick film), Vbd (thin film), and Vbd (diode) respectively represent the breakdown voltage of the gate insulating film (thick film), the breakdown voltage of the gate insulating film (thin film), and the breakdown voltage of the diode. When the gate insulating film is thick, Vbd (diode)<Vbd (thick film). When, therefore, the gate electrode is connected to the diode, the characteristic represented by a dashed line (c) in
FIG. 3
is obtained. The current flowing from the plasma and the gate voltage have a predetermined relationship. This characteristic is represented as the plasma current (dotted line) in FIG.
3
. The plasma current does not have much dependence on the gate voltage and can be approximately regarded as a constant current. Since most of the current from the plasma flows into the diode, no damage occurs.
As the thickness of the gate insulating film is reduced, the breakdown voltage decreases, and Vbd (diode)>Vbd (thin film). As a consequence, the characteristic represented by the dashed line (b) in
FIG. 3
appears, and most of the current from the plasma flows into the gate insulating film, resulting in damage to the gate insulating film. That is, the thin gate insulating film cannot be effectively protected by the diode in the prior art.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above situation in the prior art, and has as its object to provide a semiconductor device having a MOS transistor which suppresses damage to its gate insulating film connected to an interconnection when charge builds up on the interconnection by a plasma during a plasma process for the interconnection.
In order to achieve the above object, according to the principal aspect of the present invention, there is provided a semiconductor device comprising a protective element which is formed on a semiconductor substrate and conducts current to the semiconductor substrate at a voltage lower than a breakdown voltage of an insulating layer formed between a gate electrode and the semiconductor substrate, the protective element being connected to a gate electrode of a MOS transistor formed on the semiconductor substrate.
The principal aspect includes the following auxiliary aspects.
According to the first auxiliary aspect of the present invention, the protective element comprises a gate electrode and two heavily-doped N-type diffusion regions adjacent to two sides of the gate electrode, and one of the heavily-doped N-type diffusion regions is connected to the gate electrode of the MOS transistor, while the other heavily-doped N-type diffusion region is connected to the semiconductor substrate.
According to the second auxiliary aspect of the present invention, the gate electrode of the protective element has an area equal to or larger than that of the gate electrode of the MOS transistor.
According to the third auxiliary aspect of the present invention, a conductive portion that conducts current to the semiconductor substrate at a voltage lower than a breakdown voltage of an insulating layer formed between the gate electrode and the semiconductor substrate is connected to the gate electrode of the protective element.
The MOS transistor in each aspect described above is a semiconductor device for characteristic measurement.
As is obvious from the respective aspects, according to the present invention, the protective element that conducts current during a plasma process is connected to the gate electrode to allow charge flowing from the plasma to escape to the substrate through the protective element, thereby effectively preventing charge buildup on the gate electrode by the plasma. This can prevent damage to the electrode. In addition, this effect remains unchanged regardless of the thickness of the gate insulating film. The same effect can therefore be obtained even with a very thin gate insulating film. This prevents charge buildup on the gate electrode in the MOS transistor, and hence prevents damage to the insulating film.
Furthermore, when the present invention is applied to a MOS transistor for characteristic measurement, characteristics can be accurately measured withou
Chaudhuri Olik
McGinn & Gibb PLLC
NEC Corporation
Pham Hoai
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